
Kretelia Graham
Examiner (ID: 7064)
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2825, 2615, 2817, 2827 |
| Total Applications | 682 |
| Issued Applications | 565 |
| Pending Applications | 4 |
| Abandoned Applications | 116 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7797118
[patent_doc_number] => 08125828
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-02-28
[patent_title] => 'Page buffer circuit with reduced size and methods for reading and programming data with the same'
[patent_app_type] => utility
[patent_app_number] => 12/409400
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[pdf_file] => patents/08/125/08125828.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/409400 | Page buffer circuit with reduced size and methods for reading and programming data with the same | Mar 22, 2009 | Issued |
Array
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[patent_doc_number] => 20100080054
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[patent_kind] => A1
[patent_issue_date] => 2010-04-01
[patent_title] => 'NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND ITS READING METHOD'
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Array
(
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[patent_title] => 'Memory Cell With Proportional Current Self-Reference Sensing'
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[patent_app_number] => 12/406356
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/406356 | Memory cell with proportional current self-reference sensing | Mar 17, 2009 | Issued |
Array
(
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[patent_doc_number] => 08077523
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[patent_issue_date] => 2011-12-13
[patent_title] => 'Semiconductor memory device with a stacked gate including a charge storage layer and a control gate and method of controlling the same'
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[patent_app_number] => 12/406382
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Array
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[patent_title] => 'Quiescent Testing of Non-Volatile Memory Array'
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Array
(
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[patent_title] => 'NAND flash memory device and method of operating same to reduce a difference between channel potentials therein'
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Array
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[patent_title] => 'Stuck-At Defect Condition Repair for a Non-Volatile Memory Cell'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/405918 | Stuck-at defect condition repair for a non-volatile memory cell | Mar 16, 2009 | Issued |
Array
(
[id] => 6289626
[patent_doc_number] => 20100238730
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[patent_issue_date] => 2010-09-23
[patent_title] => 'CONTROLLING SELECT GATE VOLTAGE DURING ERASE TO IMPROVE ENDURANCE IN NON-VOLATILE MEMORY'
[patent_app_type] => utility
[patent_app_number] => 12/406014
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[firstpage_image] =>[orig_patent_app_number] => 12406014
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/406014 | Controlling select gate voltage during erase to improve endurance in non-volatile memory | Mar 16, 2009 | Issued |
Array
(
[id] => 4571379
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[patent_title] => 'Memory circuit and control method thereof'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/405494 | Memory circuit and control method thereof | Mar 16, 2009 | Issued |
Array
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[id] => 6537092
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[patent_issue_date] => 2010-09-16
[patent_title] => 'Content Addressable Memory (CAM) Array Capable Of Implementing Read Or Write Operations During Search Operations'
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Array
(
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[patent_title] => 'Content addressable memory having bidirectional lines that support passing read/write data and search data'
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Array
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Array
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Array
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Array
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Array
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