Search

Kretelia Graham

Examiner (ID: 7064)

Most Active Art Unit
2827
Art Unit(s)
2825, 2615, 2817, 2827
Total Applications
682
Issued Applications
565
Pending Applications
4
Abandoned Applications
116

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7797118 [patent_doc_number] => 08125828 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-28 [patent_title] => 'Page buffer circuit with reduced size and methods for reading and programming data with the same' [patent_app_type] => utility [patent_app_number] => 12/409400 [patent_app_country] => US [patent_app_date] => 2009-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 16339 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/125/08125828.pdf [firstpage_image] =>[orig_patent_app_number] => 12409400 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/409400
Page buffer circuit with reduced size and methods for reading and programming data with the same Mar 22, 2009 Issued
Array ( [id] => 6368180 [patent_doc_number] => 20100080054 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-01 [patent_title] => 'NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND ITS READING METHOD' [patent_app_type] => utility [patent_app_number] => 12/406498 [patent_app_country] => US [patent_app_date] => 2009-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 8336 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20100080054.pdf [firstpage_image] =>[orig_patent_app_number] => 12406498 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/406498
Non-volatile semiconductor memory device and its reading method Mar 17, 2009 Issued
Array ( [id] => 6310100 [patent_doc_number] => 20100110785 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-06 [patent_title] => 'Memory Cell With Proportional Current Self-Reference Sensing' [patent_app_type] => utility [patent_app_number] => 12/406356 [patent_app_country] => US [patent_app_date] => 2009-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6054 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0110/20100110785.pdf [firstpage_image] =>[orig_patent_app_number] => 12406356 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/406356
Memory cell with proportional current self-reference sensing Mar 17, 2009 Issued
Array ( [id] => 7990439 [patent_doc_number] => 08077523 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-12-13 [patent_title] => 'Semiconductor memory device with a stacked gate including a charge storage layer and a control gate and method of controlling the same' [patent_app_type] => utility [patent_app_number] => 12/406382 [patent_app_country] => US [patent_app_date] => 2009-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 9350 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/077/08077523.pdf [firstpage_image] =>[orig_patent_app_number] => 12406382 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/406382
Semiconductor memory device with a stacked gate including a charge storage layer and a control gate and method of controlling the same Mar 17, 2009 Issued
Array ( [id] => 6289526 [patent_doc_number] => 20100238700 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-23 [patent_title] => 'Quiescent Testing of Non-Volatile Memory Array' [patent_app_type] => utility [patent_app_number] => 12/405932 [patent_app_country] => US [patent_app_date] => 2009-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4430 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0238/20100238700.pdf [firstpage_image] =>[orig_patent_app_number] => 12405932 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/405932
Quiescent testing of non-volatile memory array Mar 16, 2009 Issued
Array ( [id] => 8847728 [patent_doc_number] => 08456918 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-04 [patent_title] => 'NAND flash memory device and method of operating same to reduce a difference between channel potentials therein' [patent_app_type] => utility [patent_app_number] => 12/405826 [patent_app_country] => US [patent_app_date] => 2009-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 24 [patent_no_of_words] => 15313 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12405826 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/405826
NAND flash memory device and method of operating same to reduce a difference between channel potentials therein Mar 16, 2009 Issued
Array ( [id] => 6289582 [patent_doc_number] => 20100238721 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-23 [patent_title] => 'Stuck-At Defect Condition Repair for a Non-Volatile Memory Cell' [patent_app_type] => utility [patent_app_number] => 12/405918 [patent_app_country] => US [patent_app_date] => 2009-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3688 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0238/20100238721.pdf [firstpage_image] =>[orig_patent_app_number] => 12405918 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/405918
Stuck-at defect condition repair for a non-volatile memory cell Mar 16, 2009 Issued
Array ( [id] => 6289626 [patent_doc_number] => 20100238730 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-23 [patent_title] => 'CONTROLLING SELECT GATE VOLTAGE DURING ERASE TO IMPROVE ENDURANCE IN NON-VOLATILE MEMORY' [patent_app_type] => utility [patent_app_number] => 12/406014 [patent_app_country] => US [patent_app_date] => 2009-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8144 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0238/20100238730.pdf [firstpage_image] =>[orig_patent_app_number] => 12406014 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/406014
Controlling select gate voltage during erase to improve endurance in non-volatile memory Mar 16, 2009 Issued
Array ( [id] => 4571379 [patent_doc_number] => 07839704 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-23 [patent_title] => 'Memory circuit and control method thereof' [patent_app_type] => utility [patent_app_number] => 12/405494 [patent_app_country] => US [patent_app_date] => 2009-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 13753 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 395 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/839/07839704.pdf [firstpage_image] =>[orig_patent_app_number] => 12405494 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/405494
Memory circuit and control method thereof Mar 16, 2009 Issued
Array ( [id] => 6537092 [patent_doc_number] => 20100232195 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-16 [patent_title] => 'Content Addressable Memory (CAM) Array Capable Of Implementing Read Or Write Operations During Search Operations' [patent_app_type] => utility [patent_app_number] => 12/405154 [patent_app_country] => US [patent_app_date] => 2009-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5814 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0232/20100232195.pdf [firstpage_image] =>[orig_patent_app_number] => 12405154 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/405154
Content addressable memory (CAM) array capable of implementing read or write operations during search operations Mar 15, 2009 Issued
Array ( [id] => 4522065 [patent_doc_number] => 07911818 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-22 [patent_title] => 'Content addressable memory having bidirectional lines that support passing read/write data and search data' [patent_app_type] => utility [patent_app_number] => 12/405000 [patent_app_country] => US [patent_app_date] => 2009-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6616 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/911/07911818.pdf [firstpage_image] =>[orig_patent_app_number] => 12405000 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/405000
Content addressable memory having bidirectional lines that support passing read/write data and search data Mar 15, 2009 Issued
Array ( [id] => 5421120 [patent_doc_number] => 20090147575 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-11 [patent_title] => 'NOR FLASH MEMORY DEVICE WITH A SERIAL SENSING OPERATION AND METHOD OF SENSING DATA BITS IN A NOR FLASH MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/366266 [patent_app_country] => US [patent_app_date] => 2009-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4665 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0147/20090147575.pdf [firstpage_image] =>[orig_patent_app_number] => 12366266 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/366266
NOR flash memory device with a serial sensing operation and method of sensing data bits in a NOR flash memory device Feb 4, 2009 Issued
Array ( [id] => 7498168 [patent_doc_number] => 20110261608 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-27 [patent_title] => 'Self-Repairing Memristor and Method' [patent_app_type] => utility [patent_app_number] => 13/130822 [patent_app_country] => US [patent_app_date] => 2009-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6491 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0261/20110261608.pdf [firstpage_image] =>[orig_patent_app_number] => 13130822 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/130822
Self-repairing memristor and method Jan 28, 2009 Issued
Array ( [id] => 5402707 [patent_doc_number] => 20090238021 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-24 [patent_title] => 'Semiconductor memory device and operation method therefor' [patent_app_type] => utility [patent_app_number] => 12/321906 [patent_app_country] => US [patent_app_date] => 2009-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 38 [patent_no_of_words] => 18007 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0238/20090238021.pdf [firstpage_image] =>[orig_patent_app_number] => 12321906 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/321906
Semiconductor memory device and operation method therefor Jan 26, 2009 Abandoned
Array ( [id] => 6444910 [patent_doc_number] => 20100188902 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-29 [patent_title] => 'Differential, level-shifted EEPROM structures' [patent_app_type] => utility [patent_app_number] => 12/321700 [patent_app_country] => US [patent_app_date] => 2009-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3346 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0188/20100188902.pdf [firstpage_image] =>[orig_patent_app_number] => 12321700 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/321700
Differential, level-shifted EEPROM structures Jan 22, 2009 Issued
Array ( [id] => 154470 [patent_doc_number] => 07679971 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-03-16 [patent_title] => 'Dual port PLD embedded memory block to support read-before-write in one clock cycle' [patent_app_type] => utility [patent_app_number] => 12/357892 [patent_app_country] => US [patent_app_date] => 2009-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4541 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/679/07679971.pdf [firstpage_image] =>[orig_patent_app_number] => 12357892 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/357892
Dual port PLD embedded memory block to support read-before-write in one clock cycle Jan 21, 2009 Issued
Array ( [id] => 5277026 [patent_doc_number] => 20090129158 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-21 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE INCLUDING NAND-TYPE FLASH MEMORY AND THE LIKE' [patent_app_type] => utility [patent_app_number] => 12/354946 [patent_app_country] => US [patent_app_date] => 2009-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7903 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0129/20090129158.pdf [firstpage_image] =>[orig_patent_app_number] => 12354946 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/354946
Nonvolatile semiconductor memory device including NAND-type flash memory and the like Jan 15, 2009 Issued
Array ( [id] => 5263605 [patent_doc_number] => 20090116290 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-07 [patent_title] => 'METHODS AND APPARATUSES RELATING TO AUTOMATIC CELL THRESHOLD VOLTAGE MEASUREMENT' [patent_app_type] => utility [patent_app_number] => 12/352147 [patent_app_country] => US [patent_app_date] => 2009-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5653 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0116/20090116290.pdf [firstpage_image] =>[orig_patent_app_number] => 12352147 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/352147
Methods and apparatuses relating to automatic cell threshold voltage measurement Jan 11, 2009 Issued
Array ( [id] => 5999286 [patent_doc_number] => 20110116316 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-19 [patent_title] => 'NONVOLATILE RANDOM ACCESS MEMORY' [patent_app_type] => utility [patent_app_number] => 12/863234 [patent_app_country] => US [patent_app_date] => 2009-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 25251 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0116/20110116316.pdf [firstpage_image] =>[orig_patent_app_number] => 12863234 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/863234
Nonvolatile random access memory Jan 5, 2009 Issued
Array ( [id] => 10865565 [patent_doc_number] => 08891283 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-18 [patent_title] => 'Memristive device based on current modulation by trapped charges' [patent_app_type] => utility [patent_app_number] => 13/130820 [patent_app_country] => US [patent_app_date] => 2009-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 4704 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13130820 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/130820
Memristive device based on current modulation by trapped charges Jan 4, 2009 Issued
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