Search

Kretelia Graham

Examiner (ID: 17413, Phone: (571)272-5055 , Office: P/2825 )

Most Active Art Unit
2827
Art Unit(s)
2615, 2827, 2825, 2817
Total Applications
682
Issued Applications
565
Pending Applications
4
Abandoned Applications
116

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7990455 [patent_doc_number] => 08077531 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-12-13 [patent_title] => 'Semiconductor integrated circuit including column redundancy fuse block' [patent_app_type] => utility [patent_app_number] => 12/345974 [patent_app_country] => US [patent_app_date] => 2008-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 4425 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/077/08077531.pdf [firstpage_image] =>[orig_patent_app_number] => 12345974 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/345974
Semiconductor integrated circuit including column redundancy fuse block Dec 29, 2008 Issued
Array ( [id] => 5513365 [patent_doc_number] => 20090213671 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-27 [patent_title] => 'CIRCUIT AND METHOD FOR CONTROLLING REDUNDANCY IN SEMICONDUCTOR MEMORY APPARATUS' [patent_app_type] => utility [patent_app_number] => 12/345796 [patent_app_country] => US [patent_app_date] => 2008-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4856 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0213/20090213671.pdf [firstpage_image] =>[orig_patent_app_number] => 12345796 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/345796
CIRCUIT AND METHOD FOR CONTROLLING REDUNDANCY IN SEMICONDUCTOR MEMORY APPARATUS Dec 29, 2008 Abandoned
Array ( [id] => 6306059 [patent_doc_number] => 20100109726 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-06 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR GENERATING OUTPUT ENABLE SIGNAL' [patent_app_type] => utility [patent_app_number] => 12/345918 [patent_app_country] => US [patent_app_date] => 2008-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5447 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20100109726.pdf [firstpage_image] =>[orig_patent_app_number] => 12345918 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/345918
Semiconductor memory device and method for generating output enable signal Dec 29, 2008 Issued
Array ( [id] => 6433356 [patent_doc_number] => 20100103748 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-29 [patent_title] => 'CLOCK PATH CONTROL CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE USING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/345794 [patent_app_country] => US [patent_app_date] => 2008-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3675 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0103/20100103748.pdf [firstpage_image] =>[orig_patent_app_number] => 12345794 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/345794
Clock path control circuit and semiconductor memory device using the same Dec 29, 2008 Issued
Array ( [id] => 6276701 [patent_doc_number] => 20100118614 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-13 [patent_title] => 'SEMICONDUCTOR APPARATUS, DATA WRITE CIRCUIT OF SEMICONDUCTOR APPARATUS, AND METHOD OF CONTROLLING DATA WRITE CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/345860 [patent_app_country] => US [patent_app_date] => 2008-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4518 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0118/20100118614.pdf [firstpage_image] =>[orig_patent_app_number] => 12345860 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/345860
SEMICONDUCTOR APPARATUS, DATA WRITE CIRCUIT OF SEMICONDUCTOR APPARATUS, AND METHOD OF CONTROLLING DATA WRITE CIRCUIT Dec 29, 2008 Abandoned
Array ( [id] => 7765492 [patent_doc_number] => 08116146 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-14 [patent_title] => 'Semiconductor device and method for driving the same' [patent_app_type] => utility [patent_app_number] => 12/345692 [patent_app_country] => US [patent_app_date] => 2008-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3244 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/116/08116146.pdf [firstpage_image] =>[orig_patent_app_number] => 12345692 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/345692
Semiconductor device and method for driving the same Dec 29, 2008 Issued
Array ( [id] => 6276584 [patent_doc_number] => 20100118580 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-13 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/345822 [patent_app_country] => US [patent_app_date] => 2008-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5192 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0118/20100118580.pdf [firstpage_image] =>[orig_patent_app_number] => 12345822 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/345822
SEMICONDUCTOR MEMORY DEVICE Dec 29, 2008 Abandoned
Array ( [id] => 6474944 [patent_doc_number] => 20100008162 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-14 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR GENERATING BIT LINE EQUALIZING SIGNAL' [patent_app_type] => utility [patent_app_number] => 12/345636 [patent_app_country] => US [patent_app_date] => 2008-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6953 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0008/20100008162.pdf [firstpage_image] =>[orig_patent_app_number] => 12345636 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/345636
Semiconductor memory device and method for generating bit line equalizing signal Dec 28, 2008 Issued
Array ( [id] => 7999309 [patent_doc_number] => 08081502 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-12-20 [patent_title] => 'Memory elements with body bias control' [patent_app_type] => utility [patent_app_number] => 12/345560 [patent_app_country] => US [patent_app_date] => 2008-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 6657 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/081/08081502.pdf [firstpage_image] =>[orig_patent_app_number] => 12345560 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/345560
Memory elements with body bias control Dec 28, 2008 Issued
Array ( [id] => 6218960 [patent_doc_number] => 20100054055 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-04 [patent_title] => 'DATA INPUT/OUTPUT CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/345654 [patent_app_country] => US [patent_app_date] => 2008-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4637 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0054/20100054055.pdf [firstpage_image] =>[orig_patent_app_number] => 12345654 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/345654
DATA INPUT/OUTPUT CIRCUIT Dec 28, 2008 Abandoned
Array ( [id] => 9591053 [patent_doc_number] => 08780606 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-15 [patent_title] => 'Memristive device having a porous dopant diffusion element' [patent_app_type] => utility [patent_app_number] => 13/120904 [patent_app_country] => US [patent_app_date] => 2008-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 6496 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13120904 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/120904
Memristive device having a porous dopant diffusion element Dec 22, 2008 Issued
Array ( [id] => 6610 [patent_doc_number] => 07817476 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-19 [patent_title] => 'Non-volatile memory and method with shared processing for an aggregate of read/write circuits' [patent_app_type] => utility [patent_app_number] => 12/342679 [patent_app_country] => US [patent_app_date] => 2008-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 26 [patent_no_of_words] => 9285 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/817/07817476.pdf [firstpage_image] =>[orig_patent_app_number] => 12342679 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/342679
Non-volatile memory and method with shared processing for an aggregate of read/write circuits Dec 22, 2008 Issued
Array ( [id] => 161382 [patent_doc_number] => 07675801 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-09 [patent_title] => 'Semiconductor memory device and refresh method for the same' [patent_app_type] => utility [patent_app_number] => 12/273269 [patent_app_country] => US [patent_app_date] => 2008-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8934 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/675/07675801.pdf [firstpage_image] =>[orig_patent_app_number] => 12273269 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/273269
Semiconductor memory device and refresh method for the same Nov 17, 2008 Issued
Array ( [id] => 9924679 [patent_doc_number] => 08982653 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-17 [patent_title] => 'Method and device for temperature-based data refresh in non-volatile memories' [patent_app_type] => utility [patent_app_number] => 13/128812 [patent_app_country] => US [patent_app_date] => 2008-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 8263 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13128812 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/128812
Method and device for temperature-based data refresh in non-volatile memories Nov 10, 2008 Issued
Array ( [id] => 4515350 [patent_doc_number] => 07916568 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-29 [patent_title] => 'Semiconductor memory device changing refresh interval depending on temperature' [patent_app_type] => utility [patent_app_number] => 12/264046 [patent_app_country] => US [patent_app_date] => 2008-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5851 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/916/07916568.pdf [firstpage_image] =>[orig_patent_app_number] => 12264046 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/264046
Semiconductor memory device changing refresh interval depending on temperature Nov 2, 2008 Issued
Array ( [id] => 8877302 [patent_doc_number] => 08472275 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-25 [patent_title] => 'Semiconductor memory device changing refresh interval depending on temperature' [patent_app_type] => utility [patent_app_number] => 12/251952 [patent_app_country] => US [patent_app_date] => 2008-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5857 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12251952 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/251952
Semiconductor memory device changing refresh interval depending on temperature Oct 14, 2008 Issued
Array ( [id] => 8785879 [patent_doc_number] => 08432731 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-30 [patent_title] => 'Magnetically coupled electrostatically shiftable memory device and method' [patent_app_type] => utility [patent_app_number] => 12/240563 [patent_app_country] => US [patent_app_date] => 2008-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 25 [patent_no_of_words] => 10177 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 353 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12240563 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/240563
Magnetically coupled electrostatically shiftable memory device and method Sep 28, 2008 Issued
Array ( [id] => 8773900 [patent_doc_number] => 08427867 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-23 [patent_title] => 'Systems and methods for averaging error rates in non-volatile devices and storage systems' [patent_app_type] => utility [patent_app_number] => 12/595964 [patent_app_country] => US [patent_app_date] => 2008-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 11594 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12595964 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/595964
Systems and methods for averaging error rates in non-volatile devices and storage systems Sep 16, 2008 Issued
Array ( [id] => 7524046 [patent_doc_number] => 08027210 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-27 [patent_title] => 'Data input apparatus with improved setup/hold window' [patent_app_type] => utility [patent_app_number] => 12/199046 [patent_app_country] => US [patent_app_date] => 2008-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 6223 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/027/08027210.pdf [firstpage_image] =>[orig_patent_app_number] => 12199046 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/199046
Data input apparatus with improved setup/hold window Aug 26, 2008 Issued
Array ( [id] => 4709604 [patent_doc_number] => 20080298130 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-04 [patent_title] => 'MEMORY DEVICE DISTRIBUTED CONTROLLER SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/188377 [patent_app_country] => US [patent_app_date] => 2008-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4056 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0298/20080298130.pdf [firstpage_image] =>[orig_patent_app_number] => 12188377 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/188377
Memory device distributed controller system Aug 7, 2008 Issued
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