
Kretelia Graham
Examiner (ID: 7064)
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2825, 2615, 2817, 2827 |
| Total Applications | 682 |
| Issued Applications | 565 |
| Pending Applications | 4 |
| Abandoned Applications | 116 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4948220
[patent_doc_number] => 20080304346
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-12-11
[patent_title] => 'Apparatus and method reducing aging in a data storage device'
[patent_app_type] => utility
[patent_app_number] => 11/810730
[patent_app_country] => US
[patent_app_date] => 2007-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 5154
[patent_no_of_claims] => 16
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0304/20080304346.pdf
[firstpage_image] =>[orig_patent_app_number] => 11810730
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/810730 | Apparatus and method reducing aging in a data storage device | Jun 6, 2007 | Abandoned |
Array
(
[id] => 304640
[patent_doc_number] => 07535787
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-05-19
[patent_title] => 'Methods and apparatuses for refreshing non-volatile memory'
[patent_app_type] => utility
[patent_app_number] => 11/810550
[patent_app_country] => US
[patent_app_date] => 2007-06-06
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[pdf_file] => patents/07/535/07535787.pdf
[firstpage_image] =>[orig_patent_app_number] => 11810550
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/810550 | Methods and apparatuses for refreshing non-volatile memory | Jun 5, 2007 | Issued |
Array
(
[id] => 261031
[patent_doc_number] => 07573762
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-08-11
[patent_title] => 'One time programmable element system in an integrated circuit'
[patent_app_type] => utility
[patent_app_number] => 11/759028
[patent_app_country] => US
[patent_app_date] => 2007-06-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[pdf_file] => patents/07/573/07573762.pdf
[firstpage_image] =>[orig_patent_app_number] => 11759028
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/759028 | One time programmable element system in an integrated circuit | Jun 5, 2007 | Issued |
Array
(
[id] => 16060
[patent_doc_number] => 07808839
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-10-05
[patent_title] => 'Split gate NAND flash memory structure and array, method of programming, erasing and reading thereof, and method of manufacturing'
[patent_app_type] => utility
[patent_app_number] => 11/810714
[patent_app_country] => US
[patent_app_date] => 2007-06-06
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 6294
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/808/07808839.pdf
[firstpage_image] =>[orig_patent_app_number] => 11810714
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/810714 | Split gate NAND flash memory structure and array, method of programming, erasing and reading thereof, and method of manufacturing | Jun 5, 2007 | Issued |
Array
(
[id] => 4951037
[patent_doc_number] => 20080307163
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-12-11
[patent_title] => 'METHOD FOR ACCESSING MEMORY'
[patent_app_type] => utility
[patent_app_number] => 11/758802
[patent_app_country] => US
[patent_app_date] => 2007-06-06
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0307/20080307163.pdf
[firstpage_image] =>[orig_patent_app_number] => 11758802
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/758802 | METHOD FOR ACCESSING MEMORY | Jun 5, 2007 | Abandoned |
Array
(
[id] => 7704041
[patent_doc_number] => 08089804
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-01-03
[patent_title] => 'Non-volatile semiconductor memory device using weak cells as reading identifier'
[patent_app_type] => utility
[patent_app_number] => 11/810554
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[patent_app_date] => 2007-06-06
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/08/089/08089804.pdf
[firstpage_image] =>[orig_patent_app_number] => 11810554
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/810554 | Non-volatile semiconductor memory device using weak cells as reading identifier | Jun 5, 2007 | Issued |
Array
(
[id] => 4506897
[patent_doc_number] => 07920409
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2011-04-05
[patent_title] => 'SRAM cell with intrinsically high stability and low leakage'
[patent_app_type] => utility
[patent_app_number] => 11/758568
[patent_app_country] => US
[patent_app_date] => 2007-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
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[patent_no_of_words] => 6719
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/920/07920409.pdf
[firstpage_image] =>[orig_patent_app_number] => 11758568
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/758568 | SRAM cell with intrinsically high stability and low leakage | Jun 4, 2007 | Issued |
Array
(
[id] => 4712844
[patent_doc_number] => 20080301370
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-12-04
[patent_title] => 'Memory Module'
[patent_app_type] => utility
[patent_app_number] => 11/757770
[patent_app_country] => US
[patent_app_date] => 2007-06-04
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0301/20080301370.pdf
[firstpage_image] =>[orig_patent_app_number] => 11757770
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/757770 | Memory Module | Jun 3, 2007 | Abandoned |
Array
(
[id] => 4590365
[patent_doc_number] => 07852653
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-12-14
[patent_title] => 'Content addressable memory'
[patent_app_type] => utility
[patent_app_number] => 11/810124
[patent_app_country] => US
[patent_app_date] => 2007-06-04
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/07/852/07852653.pdf
[firstpage_image] =>[orig_patent_app_number] => 11810124
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/810124 | Content addressable memory | Jun 3, 2007 | Issued |
Array
(
[id] => 4712836
[patent_doc_number] => 20080301362
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-12-04
[patent_title] => 'Content addressable memory address resolver'
[patent_app_type] => utility
[patent_app_number] => 11/810072
[patent_app_country] => US
[patent_app_date] => 2007-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
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[patent_no_of_words] => 9520
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0301/20080301362.pdf
[firstpage_image] =>[orig_patent_app_number] => 11810072
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/810072 | Content addressable memory address resolver | Jun 3, 2007 | Issued |
Array
(
[id] => 192039
[patent_doc_number] => 07643358
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-01-05
[patent_title] => 'Non volatile semiconductor memory device'
[patent_app_type] => utility
[patent_app_number] => 11/756936
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[pdf_file] => patents/07/643/07643358.pdf
[firstpage_image] =>[orig_patent_app_number] => 11756936
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/756936 | Non volatile semiconductor memory device | May 31, 2007 | Issued |
Array
(
[id] => 5009555
[patent_doc_number] => 20070280033
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-12-06
[patent_title] => 'METHODS AND DEVICES FOR REGULATING THE TIMING OF CONTROL SIGNALS IN INTEGRATED CIRCUIT MEMORY DEVICES'
[patent_app_type] => utility
[patent_app_number] => 11/756750
[patent_app_country] => US
[patent_app_date] => 2007-06-01
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0280/20070280033.pdf
[firstpage_image] =>[orig_patent_app_number] => 11756750
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/756750 | Methods and devices for regulating the timing of control signals in integrated circuit memory devices | May 31, 2007 | Issued |
Array
(
[id] => 4577101
[patent_doc_number] => 07848138
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-12-07
[patent_title] => 'Biasing a phase change memory device'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/809702 | Biasing a phase change memory device | May 31, 2007 | Issued |
Array
(
[id] => 364804
[patent_doc_number] => 07483287
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[patent_issue_date] => 2009-01-27
[patent_title] => 'Semiconductor memory'
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[firstpage_image] =>[orig_patent_app_number] => 11790529
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/790529 | Semiconductor memory | Apr 25, 2007 | Issued |
Array
(
[id] => 5003710
[patent_doc_number] => 20070201277
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[patent_issue_date] => 2007-08-30
[patent_title] => 'NOR flash memory device with a serial sensing operation and method of sensing data bits in a NOR flash memory device'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/789624 | NOR flash memory device with a serial sensing operation and method of sensing data bits in a NOR flash memory device | Apr 24, 2007 | Abandoned |
Array
(
[id] => 8631420
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[patent_issue_date] => 2013-01-29
[patent_title] => 'Device and method for state retention power gating'
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12595372
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/595372 | Device and method for state retention power gating | Apr 19, 2007 | Issued |
Array
(
[id] => 56352
[patent_doc_number] => 07768845
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-08-03
[patent_title] => 'Memory having circuitry to directly change voltages applied to bit lines and word lines in response to transitions between a read operation, first rewrite operation, and second rewrite operation'
[patent_app_type] => utility
[patent_app_number] => 11/727466
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/727466 | Memory having circuitry to directly change voltages applied to bit lines and word lines in response to transitions between a read operation, first rewrite operation, and second rewrite operation | Mar 26, 2007 | Issued |
Array
(
[id] => 4738519
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/726832 | Memory block erasing in a flash memory device | Mar 22, 2007 | Issued |
Array
(
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[patent_title] => 'Method and apparatus for power reduction on a processor bus'
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[firstpage_image] =>[orig_patent_app_number] => 11726910
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/726910 | Method and apparatus for power reduction on a processor bus | Mar 21, 2007 | Issued |