Search

Kretelia Graham

Examiner (ID: 7064)

Most Active Art Unit
2827
Art Unit(s)
2825, 2615, 2817, 2827
Total Applications
682
Issued Applications
565
Pending Applications
4
Abandoned Applications
116

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5173542 [patent_doc_number] => 20070073981 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-29 [patent_title] => 'Multi-port memory device with serial input/output interface' [patent_app_type] => utility [patent_app_number] => 11/528970 [patent_app_country] => US [patent_app_date] => 2006-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7997 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0073/20070073981.pdf [firstpage_image] =>[orig_patent_app_number] => 11528970 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/528970
Multi-port memory device with serial input/output interface Sep 26, 2006 Issued
Array ( [id] => 4942910 [patent_doc_number] => 20080080235 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-03 [patent_title] => 'Power line compensation for flash memory sense amplifiers' [patent_app_type] => utility [patent_app_number] => 11/528748 [patent_app_country] => US [patent_app_date] => 2006-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6230 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20080080235.pdf [firstpage_image] =>[orig_patent_app_number] => 11528748 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/528748
Power line compensation for flash memory sense amplifiers Sep 26, 2006 Issued
Array ( [id] => 308447 [patent_doc_number] => 07532525 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-05-12 [patent_title] => 'Semiconductor memory device for decreasing the total number of data transfer lines' [patent_app_type] => utility [patent_app_number] => 11/529178 [patent_app_country] => US [patent_app_date] => 2006-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2043 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/532/07532525.pdf [firstpage_image] =>[orig_patent_app_number] => 11529178 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/529178
Semiconductor memory device for decreasing the total number of data transfer lines Sep 26, 2006 Issued
Array ( [id] => 5257880 [patent_doc_number] => 20070211512 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-13 [patent_title] => 'Ferroelectric memory device' [patent_app_type] => utility [patent_app_number] => 11/511212 [patent_app_country] => US [patent_app_date] => 2006-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3044 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0211/20070211512.pdf [firstpage_image] =>[orig_patent_app_number] => 11511212 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/511212
Ferroelectric memory device and data read method in same Aug 28, 2006 Issued
Array ( [id] => 124261 [patent_doc_number] => 07710786 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-04 [patent_title] => 'NAND flash memory programming' [patent_app_type] => utility [patent_app_number] => 11/511038 [patent_app_country] => US [patent_app_date] => 2006-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4396 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/710/07710786.pdf [firstpage_image] =>[orig_patent_app_number] => 11511038 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/511038
NAND flash memory programming Aug 27, 2006 Issued
Array ( [id] => 364844 [patent_doc_number] => 07483305 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-01-27 [patent_title] => 'Method, apparatus and system relating to automatic cell threshold voltage measurement' [patent_app_type] => utility [patent_app_number] => 11/511172 [patent_app_country] => US [patent_app_date] => 2006-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 5645 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/483/07483305.pdf [firstpage_image] =>[orig_patent_app_number] => 11511172 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/511172
Method, apparatus and system relating to automatic cell threshold voltage measurement Aug 27, 2006 Issued
Array ( [id] => 36135 [patent_doc_number] => 07787318 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-31 [patent_title] => 'Semiconductor memory device having read operation testing function' [patent_app_type] => utility [patent_app_number] => 11/510722 [patent_app_country] => US [patent_app_date] => 2006-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 8165 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 374 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/787/07787318.pdf [firstpage_image] =>[orig_patent_app_number] => 11510722 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/510722
Semiconductor memory device having read operation testing function Aug 27, 2006 Issued
Array ( [id] => 134086 [patent_doc_number] => 07701792 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-20 [patent_title] => 'Sensing margin varying circuit and method thereof' [patent_app_type] => utility [patent_app_number] => 11/509592 [patent_app_country] => US [patent_app_date] => 2006-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5342 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/701/07701792.pdf [firstpage_image] =>[orig_patent_app_number] => 11509592 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/509592
Sensing margin varying circuit and method thereof Aug 24, 2006 Issued
Array ( [id] => 5055541 [patent_doc_number] => 20070058462 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-15 [patent_title] => 'Memory address repair without enable fuses' [patent_app_type] => utility [patent_app_number] => 11/509310 [patent_app_country] => US [patent_app_date] => 2006-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8553 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0058/20070058462.pdf [firstpage_image] =>[orig_patent_app_number] => 11509310 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/509310
Memory address repair without enable fuses Aug 23, 2006 Issued
Array ( [id] => 5055506 [patent_doc_number] => 20070058427 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-15 [patent_title] => 'Memory cell and memory cell array having an electrically floating body transistor, and methods of operating same' [patent_app_type] => utility [patent_app_number] => 11/509188 [patent_app_country] => US [patent_app_date] => 2006-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 43 [patent_no_of_words] => 23015 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0058/20070058427.pdf [firstpage_image] =>[orig_patent_app_number] => 11509188 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/509188
Memory cell and memory cell array having an electrically floating body transistor, and methods of operating same Aug 23, 2006 Issued
Array ( [id] => 248035 [patent_doc_number] => 07586792 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-09-08 [patent_title] => 'System and method for providing drain avalanche hot carrier programming for non-volatile memory applications' [patent_app_type] => utility [patent_app_number] => 11/509790 [patent_app_country] => US [patent_app_date] => 2006-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 5551 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/586/07586792.pdf [firstpage_image] =>[orig_patent_app_number] => 11509790 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/509790
System and method for providing drain avalanche hot carrier programming for non-volatile memory applications Aug 23, 2006 Issued
Array ( [id] => 5147293 [patent_doc_number] => 20070047347 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-01 [patent_title] => 'Semiconductor memory devices and a method thereof' [patent_app_type] => utility [patent_app_number] => 11/509006 [patent_app_country] => US [patent_app_date] => 2006-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6682 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0047/20070047347.pdf [firstpage_image] =>[orig_patent_app_number] => 11509006 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/509006
Semiconductor memory devices and a method thereof Aug 23, 2006 Abandoned
Array ( [id] => 808447 [patent_doc_number] => 07420849 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-09-02 [patent_title] => 'Memory device distributed controller system' [patent_app_type] => utility [patent_app_number] => 11/508728 [patent_app_country] => US [patent_app_date] => 2006-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4182 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/420/07420849.pdf [firstpage_image] =>[orig_patent_app_number] => 11508728 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/508728
Memory device distributed controller system Aug 22, 2006 Issued
Array ( [id] => 4732533 [patent_doc_number] => 20080049512 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-28 [patent_title] => 'Nonvolatile memory device and method of programming the same' [patent_app_type] => utility [patent_app_number] => 11/508336 [patent_app_country] => US [patent_app_date] => 2006-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3768 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20080049512.pdf [firstpage_image] =>[orig_patent_app_number] => 11508336 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/508336
Nonvolatile memory device and method of programming the same Aug 22, 2006 Abandoned
Array ( [id] => 5147229 [patent_doc_number] => 20070047283 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-01 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/508288 [patent_app_country] => US [patent_app_date] => 2006-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 20865 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0047/20070047283.pdf [firstpage_image] =>[orig_patent_app_number] => 11508288 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/508288
Semiconductor device Aug 22, 2006 Abandoned
Array ( [id] => 327677 [patent_doc_number] => 07515458 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-04-07 [patent_title] => 'Structure and access method for magnetic memory cell and circuit of magnetic memory' [patent_app_type] => utility [patent_app_number] => 11/465460 [patent_app_country] => US [patent_app_date] => 2006-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 20 [patent_no_of_words] => 8774 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/515/07515458.pdf [firstpage_image] =>[orig_patent_app_number] => 11465460 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/465460
Structure and access method for magnetic memory cell and circuit of magnetic memory Aug 17, 2006 Issued
Array ( [id] => 5147277 [patent_doc_number] => 20070047331 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-01 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE HAVING A DEVELOP REFERENCE VOLTAGE GENERATOR FOR SENSE AMPLIFIERS' [patent_app_type] => utility [patent_app_number] => 11/465314 [patent_app_country] => US [patent_app_date] => 2006-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3767 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0047/20070047331.pdf [firstpage_image] =>[orig_patent_app_number] => 11465314 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/465314
Semiconductor memory device having a develop reference voltage generator for sense amplifiers Aug 16, 2006 Issued
Array ( [id] => 186755 [patent_doc_number] => 07649760 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-01-19 [patent_title] => 'Semiconductor memory device having dummy sense amplifiers and methods of utilizing the same' [patent_app_type] => utility [patent_app_number] => 11/465304 [patent_app_country] => US [patent_app_date] => 2006-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8577 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/649/07649760.pdf [firstpage_image] =>[orig_patent_app_number] => 11465304 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/465304
Semiconductor memory device having dummy sense amplifiers and methods of utilizing the same Aug 16, 2006 Issued
Array ( [id] => 308443 [patent_doc_number] => 07532521 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-05-12 [patent_title] => 'NOR-NAND flash memory device with interleaved mat access' [patent_app_type] => utility [patent_app_number] => 11/464454 [patent_app_country] => US [patent_app_date] => 2006-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4075 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/532/07532521.pdf [firstpage_image] =>[orig_patent_app_number] => 11464454 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/464454
NOR-NAND flash memory device with interleaved mat access Aug 13, 2006 Issued
Array ( [id] => 94612 [patent_doc_number] => 07733694 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-08 [patent_title] => 'Nonvolatile semiconductor memory having a floating gate electrode formed within a trench' [patent_app_type] => utility [patent_app_number] => 11/464068 [patent_app_country] => US [patent_app_date] => 2006-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 31 [patent_no_of_words] => 5552 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 291 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/733/07733694.pdf [firstpage_image] =>[orig_patent_app_number] => 11464068 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/464068
Nonvolatile semiconductor memory having a floating gate electrode formed within a trench Aug 10, 2006 Issued
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