Kretelia Graham

Array ( [id] => 4650087 [patent_doc_number] => 20080037343 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-14 [patent_title] => 'MEMORY HAVING SENSE TIME OF VARIABLE DURATION' [patent_app_type] => utility [patent_app_number] => 11/464124 [patent_app_country] => US [patent_app_date] => 2006-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2964 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0037/20080037343.pdf [firstpage_image] =>[orig_patent_app_number] => 11464124 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 267939 [patent_doc_number] => 07567468 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-07-28 [patent_title] => 'Selective discharging memory circuit with reduced power consumption' [patent_app_type] => utility [patent_app_number] => 11/463890 [patent_app_country] => US [patent_app_date] => 2006-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5939 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 280 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/567/07567468.pdf [firstpage_image] =>[orig_patent_app_number] => 11463890 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 844866 [patent_doc_number] => 07388773 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-06-17 [patent_title] => 'Random access memory with a plurality of symmetrical memory cells' [patent_app_type] => utility [patent_app_number] => 11/462380 [patent_app_country] => US [patent_app_date] => 2006-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1774 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 308 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/388/07388773.pdf [firstpage_image] =>[orig_patent_app_number] => 11462380 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5624101 [patent_doc_number] => 20060262606 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-23 [patent_title] => 'Memory block erasing in a flash memory device' [patent_app_type] => utility [patent_app_number] => 11/492272 [patent_app_country] => US [patent_app_date] => 2006-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4628 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0262/20060262606.pdf [firstpage_image] =>[orig_patent_app_number] => 11492272 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5624102 [patent_doc_number] => 20060262607 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-23 [patent_title] => 'Memory block erasing in a flash memory device' [patent_app_type] => utility [patent_app_number] => 11/492596 [patent_app_country] => US [patent_app_date] => 2006-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4628 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0262/20060262607.pdf [firstpage_image] =>[orig_patent_app_number] => 11492596 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 153793 [patent_doc_number] => 07684230 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-23 [patent_title] => 'Semiconductor memory device with a memory cell power supply circuit' [patent_app_type] => utility [patent_app_number] => 11/476566 [patent_app_country] => US [patent_app_date] => 2006-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 11122 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/684/07684230.pdf [firstpage_image] =>[orig_patent_app_number] => 11476566 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10871840 [patent_doc_number] => 08897052 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-25 [patent_title] => 'Memory architecture' [patent_app_type] => utility [patent_app_number] => 11/476744 [patent_app_country] => US [patent_app_date] => 2006-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 3772 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 429 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11476744 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5170278 [patent_doc_number] => 20070070709 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-29 [patent_title] => 'Write circuit of memory device' [patent_app_type] => utility [patent_app_number] => 11/476562 [patent_app_country] => US [patent_app_date] => 2006-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3780 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20070070709.pdf [firstpage_image] =>[orig_patent_app_number] => 11476562 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5197906 [patent_doc_number] => 20070297224 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-27 [patent_title] => 'MOS based nonvolatile memory cell and method of operating the same' [patent_app_type] => utility [patent_app_number] => 11/475114 [patent_app_country] => US [patent_app_date] => 2006-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3177 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0297/20070297224.pdf [firstpage_image] =>[orig_patent_app_number] => 11475114 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4993460 [patent_doc_number] => 20070008805 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-11 [patent_title] => 'Circuit and method of driving a word line of a memory device' [patent_app_type] => utility [patent_app_number] => 11/475152 [patent_app_country] => US [patent_app_date] => 2006-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4585 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0008/20070008805.pdf [firstpage_image] =>[orig_patent_app_number] => 11475152 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5147246 [patent_doc_number] => 20070047300 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-01 [patent_title] => 'Flash memory device with improved read speed' [patent_app_type] => utility [patent_app_number] => 11/474430 [patent_app_country] => US [patent_app_date] => 2006-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4361 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0047/20070047300.pdf [firstpage_image] =>[orig_patent_app_number] => 11474430 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5218570 [patent_doc_number] => 20070159881 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-12 [patent_title] => 'Nonvolatile semiconductor memory device including nand-type flash memory and the like' [patent_app_type] => utility [patent_app_number] => 11/474340 [patent_app_country] => US [patent_app_date] => 2006-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7868 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0159/20070159881.pdf [firstpage_image] =>[orig_patent_app_number] => 11474340 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5600934 [patent_doc_number] => 20060291279 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-28 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/473402 [patent_app_country] => US [patent_app_date] => 2006-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3981 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0291/20060291279.pdf [firstpage_image] =>[orig_patent_app_number] => 11473402 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 192013 [patent_doc_number] => 07643332 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-01-05 [patent_title] => 'MRAM cell using multiple axes magnetization and method of operation' [patent_app_type] => utility [patent_app_number] => 11/474080 [patent_app_country] => US [patent_app_date] => 2006-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4779 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/643/07643332.pdf [firstpage_image] =>[orig_patent_app_number] => 11474080 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5251819 [patent_doc_number] => 20070133275 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-14 [patent_title] => 'Low-power reading reference circuit for split-gate flash memory' [patent_app_type] => utility [patent_app_number] => 11/473250 [patent_app_country] => US [patent_app_date] => 2006-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3702 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20070133275.pdf [firstpage_image] =>[orig_patent_app_number] => 11473250 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5140385 [patent_doc_number] => 20070002601 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-04 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/472336 [patent_app_country] => US [patent_app_date] => 2006-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2148 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20070002601.pdf [firstpage_image] =>[orig_patent_app_number] => 11472336 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5257917 [patent_doc_number] => 20070211549 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-13 [patent_title] => 'Semiconductor memory, memory system, and operation method of semiconductor memory' [patent_app_type] => utility [patent_app_number] => 11/471474 [patent_app_country] => US [patent_app_date] => 2006-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 10309 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0211/20070211549.pdf [firstpage_image] =>[orig_patent_app_number] => 11471474 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5833427 [patent_doc_number] => 20060245257 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-02 [patent_title] => 'Multiple level programming in a non-volatile memory device' [patent_app_type] => utility [patent_app_number] => 11/454737 [patent_app_country] => US [patent_app_date] => 2006-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3520 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0245/20060245257.pdf [firstpage_image] =>[orig_patent_app_number] => 11454737 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4521208 [patent_doc_number] => 07933156 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-26 [patent_title] => 'Adjusting a digital delay function of a data memory unit' [patent_app_type] => utility [patent_app_number] => 12/293118 [patent_app_country] => US [patent_app_date] => 2006-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4518 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/933/07933156.pdf [firstpage_image] =>[orig_patent_app_number] => 12293118 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5519991 [patent_doc_number] => 20090027972 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-29 [patent_title] => 'WORDLINE DRIVER FOR A NON-VOLATILE MEMORY DEVICE, A NON-VOLATILE MEMORY DEVICE AND METHOD' [patent_app_type] => utility [patent_app_number] => 12/282548 [patent_app_country] => US [patent_app_date] => 2006-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6474 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20090027972.pdf [firstpage_image] =>[orig_patent_app_number] => 12282548 [rel_patent_id] =>[rel_patent_doc_number] =>)