Search

Kretelia Graham

Examiner (ID: 7064)

Most Active Art Unit
2827
Art Unit(s)
2825, 2615, 2817, 2827
Total Applications
682
Issued Applications
565
Pending Applications
4
Abandoned Applications
116

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 405548 [patent_doc_number] => 07289383 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-10-30 [patent_title] => 'Reducing the number of power and ground pins required to drive address signals to memory modules' [patent_app_type] => utility [patent_app_number] => 10/925174 [patent_app_country] => US [patent_app_date] => 2004-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4538 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/289/07289383.pdf [firstpage_image] =>[orig_patent_app_number] => 10925174 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/925174
Reducing the number of power and ground pins required to drive address signals to memory modules Aug 22, 2004 Issued
Array ( [id] => 7059855 [patent_doc_number] => 20050002215 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-06 [patent_title] => 'Multiport semiconductor memory device capable of sufficiently steadily holding data and providing a sufficient write margin' [patent_app_type] => utility [patent_app_number] => 10/880530 [patent_app_country] => US [patent_app_date] => 2004-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 13072 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20050002215.pdf [firstpage_image] =>[orig_patent_app_number] => 10880530 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/880530
Multiport semiconductor memory device capable of sufficiently steadily holding data and providing a sufficient write margin Jun 30, 2004 Issued
Array ( [id] => 6999520 [patent_doc_number] => 20050138269 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-23 [patent_title] => 'Memory apparatus having multi-port architecture for supporting multi processor' [patent_app_type] => utility [patent_app_number] => 10/879274 [patent_app_country] => US [patent_app_date] => 2004-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5315 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0138/20050138269.pdf [firstpage_image] =>[orig_patent_app_number] => 10879274 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/879274
Memory apparatus having multi-port architecture for supporting multi processor Jun 29, 2004 Issued
Array ( [id] => 7172288 [patent_doc_number] => 20050122762 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-09 [patent_title] => 'FeRAM having differential data' [patent_app_type] => utility [patent_app_number] => 10/879138 [patent_app_country] => US [patent_app_date] => 2004-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 3735 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0122/20050122762.pdf [firstpage_image] =>[orig_patent_app_number] => 10879138 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/879138
FeRAM having differential data Jun 29, 2004 Issued
Array ( [id] => 7141712 [patent_doc_number] => 20050117380 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-02 [patent_title] => 'FeRAM having single ended sensing architecture' [patent_app_type] => utility [patent_app_number] => 10/879188 [patent_app_country] => US [patent_app_date] => 2004-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5774 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0117/20050117380.pdf [firstpage_image] =>[orig_patent_app_number] => 10879188 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/879188
FeRAM having single ended sensing architecture Jun 29, 2004 Issued
Array ( [id] => 503391 [patent_doc_number] => 07209398 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-24 [patent_title] => 'Semiconductor memory device having redundancy cell array shared by a plurality of memory cell arrays' [patent_app_type] => utility [patent_app_number] => 10/879100 [patent_app_country] => US [patent_app_date] => 2004-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 9982 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/209/07209398.pdf [firstpage_image] =>[orig_patent_app_number] => 10879100 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/879100
Semiconductor memory device having redundancy cell array shared by a plurality of memory cell arrays Jun 29, 2004 Issued
Array ( [id] => 5792375 [patent_doc_number] => 20060013056 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-19 [patent_title] => 'Memory architecture' [patent_app_type] => utility [patent_app_number] => 10/879158 [patent_app_country] => US [patent_app_date] => 2004-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3709 [patent_no_of_claims] => 57 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0013/20060013056.pdf [firstpage_image] =>[orig_patent_app_number] => 10879158 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/879158
Memory architecture Jun 29, 2004 Issued
Array ( [id] => 6965170 [patent_doc_number] => 20050232067 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-20 [patent_title] => 'Semiconductor integrated circuit device and data write method thereof' [patent_app_type] => utility [patent_app_number] => 10/879297 [patent_app_country] => US [patent_app_date] => 2004-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9516 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0232/20050232067.pdf [firstpage_image] =>[orig_patent_app_number] => 10879297 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/879297
Semiconductor integrated circuit device and data write method thereof Jun 29, 2004 Issued
Array ( [id] => 6943616 [patent_doc_number] => 20050195665 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-08 [patent_title] => 'Device information writing circuit' [patent_app_type] => utility [patent_app_number] => 10/879130 [patent_app_country] => US [patent_app_date] => 2004-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3082 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0195/20050195665.pdf [firstpage_image] =>[orig_patent_app_number] => 10879130 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/879130
Device information writing circuit Jun 29, 2004 Issued
Array ( [id] => 7096333 [patent_doc_number] => 20050128791 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-16 [patent_title] => 'Phase change resistor cell and nonvolatile memory device using the same' [patent_app_type] => utility [patent_app_number] => 10/879140 [patent_app_country] => US [patent_app_date] => 2004-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 4642 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20050128791.pdf [firstpage_image] =>[orig_patent_app_number] => 10879140 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/879140
Phase change resistor cell and nonvolatile memory device using the same Jun 29, 2004 Issued
Array ( [id] => 814999 [patent_doc_number] => 07414876 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-08-19 [patent_title] => 'Nonvolatile ferroelectric memory device having power control function' [patent_app_type] => utility [patent_app_number] => 10/879186 [patent_app_country] => US [patent_app_date] => 2004-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3979 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 396 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/414/07414876.pdf [firstpage_image] =>[orig_patent_app_number] => 10879186 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/879186
Nonvolatile ferroelectric memory device having power control function Jun 29, 2004 Issued
Array ( [id] => 704714 [patent_doc_number] => 07064989 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-20 [patent_title] => 'On-die termination control circuit and method of generating on-die termination control signal' [patent_app_type] => utility [patent_app_number] => 10/879386 [patent_app_country] => US [patent_app_date] => 2004-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3087 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/064/07064989.pdf [firstpage_image] =>[orig_patent_app_number] => 10879386 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/879386
On-die termination control circuit and method of generating on-die termination control signal Jun 28, 2004 Issued
Array ( [id] => 545307 [patent_doc_number] => 07173866 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-02-06 [patent_title] => 'Circuit for generating data strobe signal in DDR memory device, and method therefor' [patent_app_type] => utility [patent_app_number] => 10/879878 [patent_app_country] => US [patent_app_date] => 2004-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 5117 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/173/07173866.pdf [firstpage_image] =>[orig_patent_app_number] => 10879878 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/879878
Circuit for generating data strobe signal in DDR memory device, and method therefor Jun 28, 2004 Issued
Array ( [id] => 547685 [patent_doc_number] => 07177209 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-02-13 [patent_title] => 'Semiconductor memory device and method of driving the same' [patent_app_type] => utility [patent_app_number] => 10/879552 [patent_app_country] => US [patent_app_date] => 2004-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4858 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/177/07177209.pdf [firstpage_image] =>[orig_patent_app_number] => 10879552 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/879552
Semiconductor memory device and method of driving the same Jun 28, 2004 Issued
Array ( [id] => 745610 [patent_doc_number] => 07031210 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-18 [patent_title] => 'Method of measuring threshold voltage for a NAND flash memory device' [patent_app_type] => utility [patent_app_number] => 10/879540 [patent_app_country] => US [patent_app_date] => 2004-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3745 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/031/07031210.pdf [firstpage_image] =>[orig_patent_app_number] => 10879540 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/879540
Method of measuring threshold voltage for a NAND flash memory device Jun 28, 2004 Issued
Array ( [id] => 745588 [patent_doc_number] => 07031200 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-18 [patent_title] => 'Data output apparatus for memory device' [patent_app_type] => utility [patent_app_number] => 10/878712 [patent_app_country] => US [patent_app_date] => 2004-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3349 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/031/07031200.pdf [firstpage_image] =>[orig_patent_app_number] => 10878712 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/878712
Data output apparatus for memory device Jun 27, 2004 Issued
Array ( [id] => 7134705 [patent_doc_number] => 20050180229 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-08-18 [patent_title] => 'On die termination mode transfer circuit in semiconductor memory device and its method' [patent_app_type] => utility [patent_app_number] => 10/879650 [patent_app_country] => US [patent_app_date] => 2004-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4485 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0180/20050180229.pdf [firstpage_image] =>[orig_patent_app_number] => 10879650 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/879650
On die termination mode transfer circuit in semiconductor memory device and its method Jun 27, 2004 Issued
Array ( [id] => 467060 [patent_doc_number] => 07239570 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-03 [patent_title] => 'Magnetic memory device and method for magnetic reading and writing' [patent_app_type] => utility [patent_app_number] => 10/725706 [patent_app_country] => US [patent_app_date] => 2003-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 3043 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/239/07239570.pdf [firstpage_image] =>[orig_patent_app_number] => 10725706 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/725706
Magnetic memory device and method for magnetic reading and writing Dec 1, 2003 Issued
Array ( [id] => 821885 [patent_doc_number] => 07408803 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-08-05 [patent_title] => 'Method for writing to magnetoresistive memory cells and magnetoresistive memory which can be written to by the method' [patent_app_type] => utility [patent_app_number] => 10/642856 [patent_app_country] => US [patent_app_date] => 2003-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 23 [patent_no_of_words] => 3577 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 306 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/408/07408803.pdf [firstpage_image] =>[orig_patent_app_number] => 10642856 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/642856
Method for writing to magnetoresistive memory cells and magnetoresistive memory which can be written to by the method Aug 17, 2003 Issued
Array ( [id] => 405527 [patent_doc_number] => 07289362 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-10-30 [patent_title] => 'Erasable and programmable non-volatile cell' [patent_app_type] => utility [patent_app_number] => 10/520340 [patent_app_country] => US [patent_app_date] => 2003-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 18 [patent_no_of_words] => 2121 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/289/07289362.pdf [firstpage_image] =>[orig_patent_app_number] => 10520340 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/520340
Erasable and programmable non-volatile cell Jun 24, 2003 Issued
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