Search

Kretelia Graham

Examiner (ID: 19041, Phone: (571)272-5055 , Office: P/2825 )

Most Active Art Unit
2827
Art Unit(s)
2825, 2827, 2615, 2817
Total Applications
683
Issued Applications
562
Pending Applications
12
Abandoned Applications
115

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9733328 [patent_doc_number] => 20140269037 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'MAGNETIC MEMORY ELEMENT AND NONVOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/184920 [patent_app_country] => US [patent_app_date] => 2014-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 21961 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14184920 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/184920
Magnetic memory element and nonvolatile memory device Feb 19, 2014 Issued
Array ( [id] => 9684311 [patent_doc_number] => 20140241073 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-28 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/184566 [patent_app_country] => US [patent_app_date] => 2014-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 7887 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14184566 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/184566
Semiconductor device Feb 18, 2014 Issued
Array ( [id] => 10556828 [patent_doc_number] => 09281030 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-08 [patent_title] => 'Controlling timing of negative charge injection to generate reliable negative bitline voltage' [patent_app_type] => utility [patent_app_number] => 14/178099 [patent_app_country] => US [patent_app_date] => 2014-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 4916 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14178099 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/178099
Controlling timing of negative charge injection to generate reliable negative bitline voltage Feb 10, 2014 Issued
Array ( [id] => 10165123 [patent_doc_number] => 09196351 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-24 [patent_title] => 'Device including a plurality of memory banks and a pipeline control circuit configured to execute a command on the plurality of memory banks' [patent_app_type] => utility [patent_app_number] => 14/177210 [patent_app_country] => US [patent_app_date] => 2014-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 32 [patent_no_of_words] => 23819 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14177210 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/177210
Device including a plurality of memory banks and a pipeline control circuit configured to execute a command on the plurality of memory banks Feb 9, 2014 Issued
Array ( [id] => 9915776 [patent_doc_number] => 20150070981 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-12 [patent_title] => 'MAGNETORESISTANCE ELEMENT AND MAGNETORESISTIVE MEMORY' [patent_app_type] => utility [patent_app_number] => 14/160238 [patent_app_country] => US [patent_app_date] => 2014-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4999 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14160238 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/160238
MAGNETORESISTANCE ELEMENT AND MAGNETORESISTIVE MEMORY Jan 20, 2014 Abandoned
Array ( [id] => 10207492 [patent_doc_number] => 20150092480 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-02 [patent_title] => 'ELECTRONIC DEVICE AND METHOD OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/158702 [patent_app_country] => US [patent_app_date] => 2014-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10487 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14158702 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/158702
Electronic device for improving characteristic of variable resistance element and method of fabricating the same Jan 16, 2014 Issued
Array ( [id] => 9461851 [patent_doc_number] => 20140126277 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-08 [patent_title] => 'SRAM WITH BUFFERED-READ BIT CELLS AND ITS TESTING' [patent_app_type] => utility [patent_app_number] => 14/151313 [patent_app_country] => US [patent_app_date] => 2014-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4782 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14151313 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/151313
SRAM with buffered-read bit cells and its testing Jan 8, 2014 Issued
Array ( [id] => 10617421 [patent_doc_number] => 09336867 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-10 [patent_title] => 'Phase change memory coding' [patent_app_type] => utility [patent_app_number] => 14/148545 [patent_app_country] => US [patent_app_date] => 2014-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 41 [patent_no_of_words] => 12800 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 316 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14148545 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/148545
Phase change memory coding Jan 5, 2014 Issued
Array ( [id] => 12019492 [patent_doc_number] => 09812202 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-07 [patent_title] => 'Three dimensional opto-magnetic data storage system and method' [patent_app_type] => utility [patent_app_number] => 14/758193 [patent_app_country] => US [patent_app_date] => 2013-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4666 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 412 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14758193 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/758193
Three dimensional opto-magnetic data storage system and method Dec 25, 2013 Issued
Array ( [id] => 10461369 [patent_doc_number] => 20150346384 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-03 [patent_title] => 'Enhanced Visualization of Logging Information in Cased Wells Using Dynamic Normalization' [patent_app_type] => utility [patent_app_number] => 14/655721 [patent_app_country] => US [patent_app_date] => 2013-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5696 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14655721 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/655721
Enhanced Visualization of Logging Information in Cased Wells Using Dynamic Normalization Dec 17, 2013 Abandoned
Array ( [id] => 9733292 [patent_doc_number] => 20140269001 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'AMORPHOUS SILICON RRAM WITH NON-LINEAR DEVICE AND OPERATION' [patent_app_type] => utility [patent_app_number] => 14/106288 [patent_app_country] => US [patent_app_date] => 2013-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4166 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14106288 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/106288
AMORPHOUS SILICON RRAM WITH NON-LINEAR DEVICE AND OPERATION Dec 12, 2013 Abandoned
Array ( [id] => 10261482 [patent_doc_number] => 20150146479 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-28 [patent_title] => 'SRAM WRITE-ASSISTED OPERATION WITH VDD-TO-VCS LEVEL SHIFTING' [patent_app_type] => utility [patent_app_number] => 14/087006 [patent_app_country] => US [patent_app_date] => 2013-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2826 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14087006 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/087006
SRAM write-assisted operation with VDD-to-VCS level shifting Nov 21, 2013 Issued
Array ( [id] => 11637659 [patent_doc_number] => 09659640 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-23 [patent_title] => 'Semiconductor memory apparatus comprising a plurality of current sink units' [patent_app_type] => utility [patent_app_number] => 14/081765 [patent_app_country] => US [patent_app_date] => 2013-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 11101 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14081765 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/081765
Semiconductor memory apparatus comprising a plurality of current sink units Nov 14, 2013 Issued
Array ( [id] => 9884350 [patent_doc_number] => 08971127 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-03 [patent_title] => 'NAND flash memory programming' [patent_app_type] => utility [patent_app_number] => 14/034266 [patent_app_country] => US [patent_app_date] => 2013-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4501 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14034266 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/034266
NAND flash memory programming Sep 22, 2013 Issued
Array ( [id] => 9382483 [patent_doc_number] => 20140085964 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-27 [patent_title] => 'SEMICONDUCTOR STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 14/028942 [patent_app_country] => US [patent_app_date] => 2013-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 11340 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14028942 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/028942
SEMICONDUCTOR STORAGE DEVICE Sep 16, 2013 Abandoned
Array ( [id] => 11194081 [patent_doc_number] => 09424899 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-23 [patent_title] => 'Apparatuses and methods for providing active and inactive clock signals to a command path circuit' [patent_app_type] => utility [patent_app_number] => 14/022102 [patent_app_country] => US [patent_app_date] => 2013-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5492 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14022102 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/022102
Apparatuses and methods for providing active and inactive clock signals to a command path circuit Sep 8, 2013 Issued
Array ( [id] => 9261207 [patent_doc_number] => 20130343136 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-26 [patent_title] => 'SRAM WITH BUFFERED-READ BIT CELLS AND ITS TESTING' [patent_app_type] => utility [patent_app_number] => 14/010881 [patent_app_country] => US [patent_app_date] => 2013-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4766 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14010881 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/010881
SRAM WITH BUFFERED-READ BIT CELLS AND ITS TESTING Aug 26, 2013 Abandoned
Array ( [id] => 9261213 [patent_doc_number] => 20130343142 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-26 [patent_title] => 'DYNAMIC RANDOM ACCESS MEMORY AND BOOSTED VOLTAGE PRODUCER THEREFOR' [patent_app_type] => utility [patent_app_number] => 13/973574 [patent_app_country] => US [patent_app_date] => 2013-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 9887 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13973574 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/973574
DYNAMIC RANDOM ACCESS MEMORY AND BOOSTED VOLTAGE PRODUCER THEREFOR Aug 21, 2013 Abandoned
Array ( [id] => 9900196 [patent_doc_number] => 20150055395 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-02-26 [patent_title] => 'EXTENDED FUSE REPROGRAMMABILITY MECHANISM' [patent_app_type] => utility [patent_app_number] => 13/972414 [patent_app_country] => US [patent_app_date] => 2013-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10909 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13972414 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/972414
EXTENDED FUSE REPROGRAMMABILITY MECHANISM Aug 20, 2013 Abandoned
Array ( [id] => 9146834 [patent_doc_number] => 20130301357 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-14 [patent_title] => 'REDUCING NOISE IN SEMICONDUCTOR DEVICES' [patent_app_type] => utility [patent_app_number] => 13/943254 [patent_app_country] => US [patent_app_date] => 2013-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6927 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13943254 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/943254
Reducing noise in semiconductor devices Jul 15, 2013 Issued
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