Search

Kriellion Antionette Sanders

Examiner (ID: 8649)

Most Active Art Unit
1714
Art Unit(s)
1761, 1768, 1503, 1511, 1714, 1796, 1509
Total Applications
2736
Issued Applications
2061
Pending Applications
79
Abandoned Applications
597

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3624596 [patent_doc_number] => 05614754 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-25 [patent_title] => 'Hall device' [patent_app_type] => 1 [patent_app_number] => 8/508990 [patent_app_country] => US [patent_app_date] => 1995-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 3921 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/614/05614754.pdf [firstpage_image] =>[orig_patent_app_number] => 508990 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/508990
Hall device Jul 27, 1995 Issued
Array ( [id] => 3745278 [patent_doc_number] => 05753951 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-19 [patent_title] => 'EEPROM cell with channel hot electron programming and method for forming the same' [patent_app_type] => 1 [patent_app_number] => 8/507684 [patent_app_country] => US [patent_app_date] => 1995-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 4224 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/753/05753951.pdf [firstpage_image] =>[orig_patent_app_number] => 507684 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/507684
EEPROM cell with channel hot electron programming and method for forming the same Jul 24, 1995 Issued
Array ( [id] => 4102868 [patent_doc_number] => 06049097 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-11 [patent_title] => 'Reliable HEMT with small parasitic resistance' [patent_app_type] => 1 [patent_app_number] => 8/506363 [patent_app_country] => US [patent_app_date] => 1995-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2435 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/049/06049097.pdf [firstpage_image] =>[orig_patent_app_number] => 506363 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/506363
Reliable HEMT with small parasitic resistance Jul 23, 1995 Issued
Array ( [id] => 4161612 [patent_doc_number] => 06104072 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-15 [patent_title] => 'Analogue MISFET with threshold voltage adjuster' [patent_app_type] => 1 [patent_app_number] => 8/502257 [patent_app_country] => US [patent_app_date] => 1995-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 27 [patent_no_of_words] => 13894 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/104/06104072.pdf [firstpage_image] =>[orig_patent_app_number] => 502257 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/502257
Analogue MISFET with threshold voltage adjuster Jul 12, 1995 Issued
Array ( [id] => 3789010 [patent_doc_number] => 05821629 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-13 [patent_title] => 'Buried structure SRAM cell and methods for fabrication' [patent_app_type] => 1 [patent_app_number] => 8/501711 [patent_app_country] => US [patent_app_date] => 1995-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 18 [patent_no_of_words] => 3145 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/821/05821629.pdf [firstpage_image] =>[orig_patent_app_number] => 501711 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/501711
Buried structure SRAM cell and methods for fabrication Jul 11, 1995 Issued
Array ( [id] => 3520230 [patent_doc_number] => 05576574 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-19 [patent_title] => 'Mosfet with fully overlapped lightly doped drain structure and method for manufacturing same' [patent_app_type] => 1 [patent_app_number] => 8/497521 [patent_app_country] => US [patent_app_date] => 1995-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 1535 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/576/05576574.pdf [firstpage_image] =>[orig_patent_app_number] => 497521 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/497521
Mosfet with fully overlapped lightly doped drain structure and method for manufacturing same Jun 29, 1995 Issued
Array ( [id] => 3638044 [patent_doc_number] => 05631480 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-20 [patent_title] => 'DRAM stack capacitor with ladder storage node' [patent_app_type] => 1 [patent_app_number] => 8/494637 [patent_app_country] => US [patent_app_date] => 1995-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 2418 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/631/05631480.pdf [firstpage_image] =>[orig_patent_app_number] => 494637 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/494637
DRAM stack capacitor with ladder storage node Jun 22, 1995 Issued
Array ( [id] => 3651948 [patent_doc_number] => 05629546 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-13 [patent_title] => 'Static memory cell and method of manufacturing a static memory cell' [patent_app_type] => 1 [patent_app_number] => 8/492774 [patent_app_country] => US [patent_app_date] => 1995-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 6005 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/629/05629546.pdf [firstpage_image] =>[orig_patent_app_number] => 492774 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/492774
Static memory cell and method of manufacturing a static memory cell Jun 20, 1995 Issued
Array ( [id] => 3602698 [patent_doc_number] => 05559355 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-24 [patent_title] => 'Vertical MOS semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/492854 [patent_app_country] => US [patent_app_date] => 1995-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 4053 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 270 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/559/05559355.pdf [firstpage_image] =>[orig_patent_app_number] => 492854 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/492854
Vertical MOS semiconductor device Jun 19, 1995 Issued
08/492903 SEMICONDUCTOR DEVICE Jun 19, 1995 Abandoned
Array ( [id] => 3732704 [patent_doc_number] => 05703380 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-30 [patent_title] => 'Laminar composite lateral field-emission cathode' [patent_app_type] => 1 [patent_app_number] => 8/490061 [patent_app_country] => US [patent_app_date] => 1995-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 29 [patent_no_of_words] => 7453 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/703/05703380.pdf [firstpage_image] =>[orig_patent_app_number] => 490061 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/490061
Laminar composite lateral field-emission cathode Jun 12, 1995 Issued
Array ( [id] => 3662036 [patent_doc_number] => 05659195 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-19 [patent_title] => 'CMOS integrated microsensor with a precision measurement circuit' [patent_app_type] => 1 [patent_app_number] => 8/489023 [patent_app_country] => US [patent_app_date] => 1995-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 6587 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/659/05659195.pdf [firstpage_image] =>[orig_patent_app_number] => 489023 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/489023
CMOS integrated microsensor with a precision measurement circuit Jun 7, 1995 Issued
Array ( [id] => 3557385 [patent_doc_number] => 05519250 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-05-21 [patent_title] => 'Reliability of metal leads in high speed LSI semiconductors using both dummy leads and thermoconductive layers' [patent_app_type] => 1 [patent_app_number] => 8/486305 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 12 [patent_no_of_words] => 3594 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/519/05519250.pdf [firstpage_image] =>[orig_patent_app_number] => 486305 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/486305
Reliability of metal leads in high speed LSI semiconductors using both dummy leads and thermoconductive layers Jun 6, 1995 Issued
08/474855 APPARATUS AND METHOD OF FABRICATING A MULTIPLE SUBSTRATE BIAS DYNAMIC RANDOM ACCESS MEMORY DEVICE Jun 6, 1995 Abandoned
Array ( [id] => 3496303 [patent_doc_number] => 05561317 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-01 [patent_title] => 'Method of manufacturing semiconductor devices' [patent_app_type] => 1 [patent_app_number] => 8/478447 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 39 [patent_no_of_words] => 8589 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/561/05561317.pdf [firstpage_image] =>[orig_patent_app_number] => 478447 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/478447
Method of manufacturing semiconductor devices Jun 6, 1995 Issued
Array ( [id] => 3733155 [patent_doc_number] => 05670822 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-23 [patent_title] => 'CMOS process compatible self-alignment lateral bipolar junction transistor' [patent_app_type] => 1 [patent_app_number] => 8/476311 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 2660 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 270 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/670/05670822.pdf [firstpage_image] =>[orig_patent_app_number] => 476311 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/476311
CMOS process compatible self-alignment lateral bipolar junction transistor Jun 6, 1995 Issued
Array ( [id] => 4037936 [patent_doc_number] => 05994739 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-30 [patent_title] => 'Integrated circuit device' [patent_app_type] => 1 [patent_app_number] => 8/478654 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 68 [patent_no_of_words] => 9958 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/994/05994739.pdf [firstpage_image] =>[orig_patent_app_number] => 478654 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/478654
Integrated circuit device Jun 6, 1995 Issued
Array ( [id] => 3882398 [patent_doc_number] => 05747842 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-05 [patent_title] => 'Epitaxial overgrowth method and devices' [patent_app_type] => 1 [patent_app_number] => 8/472791 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 40 [patent_no_of_words] => 7335 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/747/05747842.pdf [firstpage_image] =>[orig_patent_app_number] => 472791 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/472791
Epitaxial overgrowth method and devices Jun 6, 1995 Issued
08/481071 STRUCTURE AND PROCESS FOR REDUCING THE ON-RESISTANCE OF MOS-GATED POWER DEVICES Jun 6, 1995 Abandoned
Array ( [id] => 3727679 [patent_doc_number] => 05682051 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-28 [patent_title] => 'CMOS integrated circuit with reduced susceptibility to PMOS punchthrough' [patent_app_type] => 1 [patent_app_number] => 8/480725 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 9 [patent_no_of_words] => 7864 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/682/05682051.pdf [firstpage_image] =>[orig_patent_app_number] => 480725 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/480725
CMOS integrated circuit with reduced susceptibility to PMOS punchthrough Jun 6, 1995 Issued
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