| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 3559326
[patent_doc_number] => 05543657
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-08-06
[patent_title] => 'Single layer leadframe design with groundplane capability'
[patent_app_type] => 1
[patent_app_number] => 8/319525
[patent_app_country] => US
[patent_app_date] => 1994-10-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_no_of_words] => 7424
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[pdf_file] => patents/05/543/05543657.pdf
[firstpage_image] =>[orig_patent_app_number] => 319525
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/319525 | Single layer leadframe design with groundplane capability | Oct 6, 1994 | Issued |
Array
(
[id] => 3734897
[patent_doc_number] => 05635741
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-06-03
[patent_title] => 'Barium strontium titanate (BST) thin films by erbium donor doping'
[patent_app_type] => 1
[patent_app_number] => 8/315725
[patent_app_country] => US
[patent_app_date] => 1994-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/635/05635741.pdf
[firstpage_image] =>[orig_patent_app_number] => 315725
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/315725 | Barium strontium titanate (BST) thin films by erbium donor doping | Sep 29, 1994 | Issued |
Array
(
[id] => 3453070
[patent_doc_number] => 05424569
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-06-13
[patent_title] => 'Array of non-volatile sonos memory cells'
[patent_app_type] => 1
[patent_app_number] => 8/315977
[patent_app_country] => US
[patent_app_date] => 1994-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_words_short_claim] => 181
[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/424/05424569.pdf
[firstpage_image] =>[orig_patent_app_number] => 315977
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/315977 | Array of non-volatile sonos memory cells | Sep 29, 1994 | Issued |
Array
(
[id] => 3662065
[patent_doc_number] => 05659197
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-08-19
[patent_title] => 'Hot-carrier shield formation for bipolar transistor'
[patent_app_type] => 1
[patent_app_number] => 8/311092
[patent_app_country] => US
[patent_app_date] => 1994-09-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 4954
[patent_no_of_claims] => 5
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[patent_words_short_claim] => 385
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/659/05659197.pdf
[firstpage_image] =>[orig_patent_app_number] => 311092
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/311092 | Hot-carrier shield formation for bipolar transistor | Sep 22, 1994 | Issued |
| 08/310067 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND A METHOD OF PRODUCING THE SAME | Sep 22, 1994 | Abandoned |
Array
(
[id] => 3517951
[patent_doc_number] => 05512772
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-04-30
[patent_title] => 'Semiconductor device having bipolar transistor and MOS transistor'
[patent_app_type] => 1
[patent_app_number] => 8/309034
[patent_app_country] => US
[patent_app_date] => 1994-09-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
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[patent_no_of_words] => 4066
[patent_no_of_claims] => 9
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/512/05512772.pdf
[firstpage_image] =>[orig_patent_app_number] => 309034
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/309034 | Semiconductor device having bipolar transistor and MOS transistor | Sep 19, 1994 | Issued |
Array
(
[id] => 3557247
[patent_doc_number] => 05519241
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-05-21
[patent_title] => 'Circuit structure having at least one bipolar power component and method for the operation thereof'
[patent_app_type] => 1
[patent_app_number] => 8/309875
[patent_app_country] => US
[patent_app_date] => 1994-09-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/519/05519241.pdf
[firstpage_image] =>[orig_patent_app_number] => 309875
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/309875 | Circuit structure having at least one bipolar power component and method for the operation thereof | Sep 19, 1994 | Issued |
Array
(
[id] => 3106132
[patent_doc_number] => 05448091
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-09-05
[patent_title] => 'Method of making contact alignment for nonvolatile memory devices'
[patent_app_type] => 1
[patent_app_number] => 8/307475
[patent_app_country] => US
[patent_app_date] => 1994-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 10
[patent_no_of_words] => 3688
[patent_no_of_claims] => 7
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[patent_words_short_claim] => 233
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/448/05448091.pdf
[firstpage_image] =>[orig_patent_app_number] => 307475
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/307475 | Method of making contact alignment for nonvolatile memory devices | Sep 15, 1994 | Issued |
Array
(
[id] => 3633044
[patent_doc_number] => 05686737
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-11-11
[patent_title] => 'Self-aligned field-effect transistor for high frequency applications'
[patent_app_type] => 1
[patent_app_number] => 8/307173
[patent_app_country] => US
[patent_app_date] => 1994-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 4
[patent_no_of_words] => 3446
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 201
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/686/05686737.pdf
[firstpage_image] =>[orig_patent_app_number] => 307173
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/307173 | Self-aligned field-effect transistor for high frequency applications | Sep 15, 1994 | Issued |
Array
(
[id] => 3493714
[patent_doc_number] => 05471082
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-11-28
[patent_title] => 'Semiconductor device and a method for manufacturing the same'
[patent_app_type] => 1
[patent_app_number] => 8/305601
[patent_app_country] => US
[patent_app_date] => 1994-09-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 35
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[patent_no_of_words] => 15800
[patent_no_of_claims] => 12
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/471/05471082.pdf
[firstpage_image] =>[orig_patent_app_number] => 305601
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/305601 | Semiconductor device and a method for manufacturing the same | Sep 13, 1994 | Issued |
| 08/305065 | ESD TOLERATED SOI DEVICE | Sep 12, 1994 | Abandoned |
Array
(
[id] => 3461511
[patent_doc_number] => 05473179
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-12-05
[patent_title] => 'Method for improving erase characteristics and coupling ratios of buried bit line flash EPROM devices'
[patent_app_type] => 1
[patent_app_number] => 8/304693
[patent_app_country] => US
[patent_app_date] => 1994-09-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_claims] => 7
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/473/05473179.pdf
[firstpage_image] =>[orig_patent_app_number] => 304693
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/304693 | Method for improving erase characteristics and coupling ratios of buried bit line flash EPROM devices | Sep 11, 1994 | Issued |
Array
(
[id] => 3496341
[patent_doc_number] => 05536959
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-16
[patent_title] => 'Self-aligned charge screen (SACS) field effect transistors and methods'
[patent_app_type] => 1
[patent_app_number] => 8/303698
[patent_app_country] => US
[patent_app_date] => 1994-09-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 3752
[patent_no_of_claims] => 23
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/536/05536959.pdf
[firstpage_image] =>[orig_patent_app_number] => 303698
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/303698 | Self-aligned charge screen (SACS) field effect transistors and methods | Sep 8, 1994 | Issued |
Array
(
[id] => 3692075
[patent_doc_number] => 05644155
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-07-01
[patent_title] => 'Structure and fabrication of high capacitance insulated-gate field effect transistor'
[patent_app_type] => 1
[patent_app_number] => 8/301365
[patent_app_country] => US
[patent_app_date] => 1994-09-06
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/644/05644155.pdf
[firstpage_image] =>[orig_patent_app_number] => 301365
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/301365 | Structure and fabrication of high capacitance insulated-gate field effect transistor | Sep 5, 1994 | Issued |
Array
(
[id] => 3721301
[patent_doc_number] => 05616939
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-04-01
[patent_title] => 'Semiconductor device including rectangular functional blocks having at least one common length'
[patent_app_type] => 1
[patent_app_number] => 8/300213
[patent_app_country] => US
[patent_app_date] => 1994-09-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/616/05616939.pdf
[firstpage_image] =>[orig_patent_app_number] => 300213
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/300213 | Semiconductor device including rectangular functional blocks having at least one common length | Sep 5, 1994 | Issued |
| 08/298239 | METHOD OF FABRICATING INTEGRATED CIRCUIT CHIP CONTAINING EEPROM AND CAPACITOR | Aug 29, 1994 | Abandoned |
| 08/298099 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME | Aug 29, 1994 | Abandoned |
| 08/292891 | BIPOLAR AND BIMOS STRUCTURES AND FABRICATION METHODS | Aug 17, 1994 | Abandoned |
Array
(
[id] => 3490884
[patent_doc_number] => 05426324
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-06-20
[patent_title] => 'High capacitance multi-level storage node for high density TFT load SRAMs with low soft error rates'
[patent_app_type] => 1
[patent_app_number] => 8/289155
[patent_app_country] => US
[patent_app_date] => 1994-08-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[pdf_file] => patents/05/426/05426324.pdf
[firstpage_image] =>[orig_patent_app_number] => 289155
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/289155 | High capacitance multi-level storage node for high density TFT load SRAMs with low soft error rates | Aug 10, 1994 | Issued |
Array
(
[id] => 3431848
[patent_doc_number] => 05455431
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-10-03
[patent_title] => 'Nonlinear optical materials and their manufacturing method'
[patent_app_type] => 1
[patent_app_number] => 8/289125
[patent_app_country] => US
[patent_app_date] => 1994-08-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
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[pdf_file] => patents/05/455/05455431.pdf
[firstpage_image] =>[orig_patent_app_number] => 289125
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/289125 | Nonlinear optical materials and their manufacturing method | Aug 10, 1994 | Issued |