| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 2717534
[patent_doc_number] => 05017998
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-05-21
[patent_title] => 'Semiconductor device using SOI substrate'
[patent_app_type] => 1
[patent_app_number] => 7/572597
[patent_app_country] => US
[patent_app_date] => 1990-08-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 16
[patent_no_of_words] => 4225
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/017/05017998.pdf
[firstpage_image] =>[orig_patent_app_number] => 572597
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/572597 | Semiconductor device using SOI substrate | Aug 26, 1990 | Issued |
Array
(
[id] => 2877960
[patent_doc_number] => 05162881
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-11-10
[patent_title] => 'Dynamic random access memory device having rampart structure outside memory cell array'
[patent_app_type] => 1
[patent_app_number] => 7/571967
[patent_app_country] => US
[patent_app_date] => 1990-08-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 3336
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/162/05162881.pdf
[firstpage_image] =>[orig_patent_app_number] => 571967
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/571967 | Dynamic random access memory device having rampart structure outside memory cell array | Aug 23, 1990 | Issued |
Array
(
[id] => 2677000
[patent_doc_number] => 05047827
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-09-10
[patent_title] => 'Integrated circuit resistor fabrication using focused ion beam'
[patent_app_type] => 1
[patent_app_number] => 7/569690
[patent_app_country] => US
[patent_app_date] => 1990-08-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 5
[patent_no_of_words] => 3959
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 56
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/047/05047827.pdf
[firstpage_image] =>[orig_patent_app_number] => 569690
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/569690 | Integrated circuit resistor fabrication using focused ion beam | Aug 19, 1990 | Issued |
| 07/570131 | VERTICAL FUSE DEVICE | Aug 19, 1990 | Abandoned |
Array
(
[id] => 2855420
[patent_doc_number] => 05111254
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-05-05
[patent_title] => 'Floating gate array transistors'
[patent_app_type] => 1
[patent_app_number] => 7/569355
[patent_app_country] => US
[patent_app_date] => 1990-08-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 2983
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 252
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/111/05111254.pdf
[firstpage_image] =>[orig_patent_app_number] => 569355
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/569355 | Floating gate array transistors | Aug 16, 1990 | Issued |
| 07/566237 | SPECIAL GEOMETRY SCHOTTKY DIODE | Aug 14, 1990 | Abandoned |
Array
(
[id] => 2821145
[patent_doc_number] => 05079612
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-01-07
[patent_title] => 'Semiconductor integrated circuit device'
[patent_app_type] => 1
[patent_app_number] => 7/564615
[patent_app_country] => US
[patent_app_date] => 1990-08-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 20
[patent_no_of_words] => 4061
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 186
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/079/05079612.pdf
[firstpage_image] =>[orig_patent_app_number] => 564615
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/564615 | Semiconductor integrated circuit device | Aug 8, 1990 | Issued |
Array
(
[id] => 2794455
[patent_doc_number] => 05155571
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-10-13
[patent_title] => 'Complementary field effect transistors having strained superlattice structure'
[patent_app_type] => 1
[patent_app_number] => 7/563038
[patent_app_country] => US
[patent_app_date] => 1990-08-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 2193
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/155/05155571.pdf
[firstpage_image] =>[orig_patent_app_number] => 563038
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/563038 | Complementary field effect transistors having strained superlattice structure | Aug 5, 1990 | Issued |
Array
(
[id] => 2716757
[patent_doc_number] => 05041893
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-08-20
[patent_title] => 'Semiconductor integrated circuit including an intrinsic MOS transistor for generating a reference voltage'
[patent_app_type] => 1
[patent_app_number] => 7/560721
[patent_app_country] => US
[patent_app_date] => 1990-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 16
[patent_no_of_words] => 4942
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 153
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/041/05041893.pdf
[firstpage_image] =>[orig_patent_app_number] => 560721
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/560721 | Semiconductor integrated circuit including an intrinsic MOS transistor for generating a reference voltage | Jul 30, 1990 | Issued |
Array
(
[id] => 2855047
[patent_doc_number] => 05107311
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-04-21
[patent_title] => 'Semiconductor light-emitting device'
[patent_app_type] => 1
[patent_app_number] => 7/560769
[patent_app_country] => US
[patent_app_date] => 1990-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 3045
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/107/05107311.pdf
[firstpage_image] =>[orig_patent_app_number] => 560769
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/560769 | Semiconductor light-emitting device | Jul 30, 1990 | Issued |
Array
(
[id] => 2884994
[patent_doc_number] => 05159425
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-10-27
[patent_title] => 'Insulated gate device with current mirror having bi-directional capability'
[patent_app_type] => 1
[patent_app_number] => 7/561493
[patent_app_country] => US
[patent_app_date] => 1990-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 14
[patent_no_of_words] => 3703
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 208
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/159/05159425.pdf
[firstpage_image] =>[orig_patent_app_number] => 561493
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/561493 | Insulated gate device with current mirror having bi-directional capability | Jul 30, 1990 | Issued |
| 07/559327 | THIN FILM TRANSISTOR AND PREPARATION THEREOF | Jul 29, 1990 | Abandoned |
| 07/556880 | SEMICONDUCTOR DEVICE | Jul 22, 1990 | Abandoned |
Array
(
[id] => 2810181
[patent_doc_number] => 05124774
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-06-23
[patent_title] => 'Compact SRAM cell layout'
[patent_app_type] => 1
[patent_app_number] => 7/555559
[patent_app_country] => US
[patent_app_date] => 1990-07-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 4641
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 178
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/124/05124774.pdf
[firstpage_image] =>[orig_patent_app_number] => 555559
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/555559 | Compact SRAM cell layout | Jul 18, 1990 | Issued |
Array
(
[id] => 2752863
[patent_doc_number] => 05012305
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-04-30
[patent_title] => 'High speed junction field effect transistor for use in bipolar integrated circuits'
[patent_app_type] => 1
[patent_app_number] => 7/553181
[patent_app_country] => US
[patent_app_date] => 1990-07-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 1368
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 194
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/012/05012305.pdf
[firstpage_image] =>[orig_patent_app_number] => 553181
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/553181 | High speed junction field effect transistor for use in bipolar integrated circuits | Jul 12, 1990 | Issued |
Array
(
[id] => 2714149
[patent_doc_number] => 05014103
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-05-07
[patent_title] => 'Dynamic random access memory having improved layout and method of arranging memory cell pattern of the dynamic random access memory'
[patent_app_type] => 1
[patent_app_number] => 7/551237
[patent_app_country] => US
[patent_app_date] => 1990-07-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 11
[patent_no_of_words] => 4049
[patent_no_of_claims] => 35
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/014/05014103.pdf
[firstpage_image] =>[orig_patent_app_number] => 551237
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/551237 | Dynamic random access memory having improved layout and method of arranging memory cell pattern of the dynamic random access memory | Jul 10, 1990 | Issued |
| 07/550687 | FIELD EFFECT TRANSISTOR AND PROCESS FOR PRODUCING THE SAME | Jul 9, 1990 | Abandoned |
Array
(
[id] => 2774053
[patent_doc_number] => 05036370
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-07-30
[patent_title] => 'Thin film semiconductor array device'
[patent_app_type] => 1
[patent_app_number] => 7/545955
[patent_app_country] => US
[patent_app_date] => 1990-07-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 11
[patent_no_of_words] => 2780
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/036/05036370.pdf
[firstpage_image] =>[orig_patent_app_number] => 545955
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/545955 | Thin film semiconductor array device | Jul 1, 1990 | Issued |
Array
(
[id] => 2695421
[patent_doc_number] => 05049972
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-09-17
[patent_title] => 'Method of manufacturing semiconductor integrated circuit device'
[patent_app_type] => 1
[patent_app_number] => 7/544064
[patent_app_country] => US
[patent_app_date] => 1990-06-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 26
[patent_no_of_words] => 13374
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/049/05049972.pdf
[firstpage_image] =>[orig_patent_app_number] => 544064
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/544064 | Method of manufacturing semiconductor integrated circuit device | Jun 25, 1990 | Issued |
| 07/541212 | SILICON CARBIDE SEMICONDUCTOR DEVICE | Jun 21, 1990 | Abandoned |