| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 2453941
[patent_doc_number] => 04755867
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-07-05
[patent_title] => 'Vertical Enhancement-mode Group III-V compound MISFETs'
[patent_app_type] => 1
[patent_app_number] => 6/896772
[patent_app_country] => US
[patent_app_date] => 1986-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
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[pdf_file] => patents/04/755/04755867.pdf
[firstpage_image] =>[orig_patent_app_number] => 896772
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/896772 | Vertical Enhancement-mode Group III-V compound MISFETs | Aug 14, 1986 | Issued |
| 06/894557 | PACKAGING SYSTEM FOR MULTIPLE SEMICONDUCTOR DEVICES | Aug 7, 1986 | Abandoned |
Array
(
[id] => 2561569
[patent_doc_number] => 04814840
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-03-21
[patent_title] => 'High-density reprogrammable semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 6/893941
[patent_app_country] => US
[patent_app_date] => 1986-08-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/814/04814840.pdf
[firstpage_image] =>[orig_patent_app_number] => 893941
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/893941 | High-density reprogrammable semiconductor memory device | Aug 5, 1986 | Issued |
Array
(
[id] => 2331565
[patent_doc_number] => 04706100
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-11-10
[patent_title] => 'High temperature hetero-epitaxial pressure sensor'
[patent_app_type] => 1
[patent_app_number] => 6/891829
[patent_app_country] => US
[patent_app_date] => 1986-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 3
[patent_no_of_words] => 1029
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 91
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/706/04706100.pdf
[firstpage_image] =>[orig_patent_app_number] => 891829
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/891829 | High temperature hetero-epitaxial pressure sensor | Jul 31, 1986 | Issued |
Array
(
[id] => 2422952
[patent_doc_number] => 04729000
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-03-01
[patent_title] => 'Low power AlGaAs/GaAs complementary FETs incorporating InGaAs n-channel gates'
[patent_app_type] => 1
[patent_app_number] => 6/891831
[patent_app_country] => US
[patent_app_date] => 1986-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 13
[patent_no_of_words] => 4099
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 12
[patent_words_short_claim] => 268
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/729/04729000.pdf
[firstpage_image] =>[orig_patent_app_number] => 891831
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/891831 | Low power AlGaAs/GaAs complementary FETs incorporating InGaAs n-channel gates | Jul 31, 1986 | Issued |
Array
(
[id] => 2421284
[patent_doc_number] => 04736236
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-04-05
[patent_title] => 'Tape bonding material and structure for electronic circuit fabrication'
[patent_app_type] => 1
[patent_app_number] => 6/889564
[patent_app_country] => US
[patent_app_date] => 1986-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 11
[patent_no_of_words] => 5762
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/736/04736236.pdf
[firstpage_image] =>[orig_patent_app_number] => 889564
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/889564 | Tape bonding material and structure for electronic circuit fabrication | Jul 24, 1986 | Issued |
| 06/888049 | METHOD AND PACKAGE FOR DISSIPATING HEAT GENERATED BY AN INTEGRATED CIRCUIT CHIP | Jul 17, 1986 | Abandoned |
| 06/885995 | VLSI SELF-ALIGNED BIPOLAR TRANSISTOR | Jul 15, 1986 | Abandoned |
| 06/880407 | REDUCTION IN POWER RAIL PERTURBATION AND IN THE EFFECT THEREOF ON INTEGRATED CIRCUIT PERFORMANCE | Jun 29, 1986 | Abandoned |
| 06/877968 | SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING THE SAME | Jun 23, 1986 | Abandoned |
Array
(
[id] => 2315383
[patent_doc_number] => 04675718
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-06-23
[patent_title] => 'Diode-containing connector'
[patent_app_type] => 1
[patent_app_number] => 6/871919
[patent_app_country] => US
[patent_app_date] => 1986-06-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[pdf_file] => patents/04/675/04675718.pdf
[firstpage_image] =>[orig_patent_app_number] => 871919
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/871919 | Diode-containing connector | Jun 8, 1986 | Issued |
Array
(
[id] => 2320524
[patent_doc_number] => 04716446
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-12-29
[patent_title] => 'Insulated dual gate field effect transistor'
[patent_app_type] => 1
[patent_app_number] => 6/872630
[patent_app_country] => US
[patent_app_date] => 1986-06-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 11
[patent_no_of_words] => 4505
[patent_no_of_claims] => 8
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[patent_words_short_claim] => 298
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/716/04716446.pdf
[firstpage_image] =>[orig_patent_app_number] => 872630
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/872630 | Insulated dual gate field effect transistor | Jun 8, 1986 | Issued |
Array
(
[id] => 2323071
[patent_doc_number] => 04689648
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-08-25
[patent_title] => 'Magnetically sensitive metal semiconductor devices'
[patent_app_type] => 1
[patent_app_number] => 6/868900
[patent_app_country] => US
[patent_app_date] => 1986-05-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 9
[patent_no_of_words] => 4388
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 169
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/689/04689648.pdf
[firstpage_image] =>[orig_patent_app_number] => 868900
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/868900 | Magnetically sensitive metal semiconductor devices | May 26, 1986 | Issued |
Array
(
[id] => 2323185
[patent_doc_number] => 04689656
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-08-25
[patent_title] => 'Method for forming a void free isolation pattern and resulting structure'
[patent_app_type] => 1
[patent_app_number] => 6/868180
[patent_app_country] => US
[patent_app_date] => 1986-05-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 4307
[patent_no_of_claims] => 6
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/689/04689656.pdf
[firstpage_image] =>[orig_patent_app_number] => 868180
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/868180 | Method for forming a void free isolation pattern and resulting structure | May 22, 1986 | Issued |
| 06/865397 | FIELD EFFECT TRANSISTOR | May 20, 1986 | Abandoned |
Array
(
[id] => 2418871
[patent_doc_number] => 04725876
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-02-16
[patent_title] => 'Semiconductor device having at least two resistors with high resistance values'
[patent_app_type] => 1
[patent_app_number] => 6/867422
[patent_app_country] => US
[patent_app_date] => 1986-05-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[patent_no_of_words] => 9810
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 8
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/725/04725876.pdf
[firstpage_image] =>[orig_patent_app_number] => 867422
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/867422 | Semiconductor device having at least two resistors with high resistance values | May 14, 1986 | Issued |
Array
(
[id] => 2554033
[patent_doc_number] => 04811072
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-03-07
[patent_title] => 'Semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 6/863262
[patent_app_country] => US
[patent_app_date] => 1986-05-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 13
[patent_no_of_words] => 4012
[patent_no_of_claims] => 34
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[pdf_file] => patents/04/811/04811072.pdf
[firstpage_image] =>[orig_patent_app_number] => 863262
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/863262 | Semiconductor device | May 12, 1986 | Issued |
| 06/860040 | SEMICONDUCTOR DEVICE HAVING WIRING ELECTRODES | May 5, 1986 | Abandoned |
| 06/859940 | DIRECT INTERCONNECTION FOR USE BETWEEN A SEMICONDUCTOR AND A PIN CONNECTOR OR THE LIKE | May 4, 1986 | Abandoned |
Array
(
[id] => 2515028
[patent_doc_number] => 04796081
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-01-03
[patent_title] => 'Low resistance metal contact for silicon devices'
[patent_app_type] => 1
[patent_app_number] => 6/858994
[patent_app_country] => US
[patent_app_date] => 1986-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/796/04796081.pdf
[firstpage_image] =>[orig_patent_app_number] => 858994
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/858994 | Low resistance metal contact for silicon devices | May 1, 1986 | Issued |