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Kriellion Antionette Sanders

Examiner (ID: 8649)

Most Active Art Unit
1714
Art Unit(s)
1761, 1768, 1503, 1511, 1714, 1796, 1509
Total Applications
2736
Issued Applications
2061
Pending Applications
79
Abandoned Applications
597

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2364001 [patent_doc_number] => 04665423 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-05-12 [patent_title] => 'MIS variable resistor' [patent_app_type] => 1 [patent_app_number] => 6/783063 [patent_app_country] => US [patent_app_date] => 1985-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 3240 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/665/04665423.pdf [firstpage_image] =>[orig_patent_app_number] => 783063 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/783063
MIS variable resistor Oct 1, 1985 Issued
06/781280 SILICIDE DIFFUSION SOURCE AND SELF-ALIGNMENT METHOD Sep 26, 1985 Abandoned
06/773832 STACKED TANTALUM CAPACITORS FOR VLSI SEMICONDUCTOR DEVICES Sep 3, 1985 Abandoned
Array ( [id] => 2320553 [patent_doc_number] => 04716448 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-12-29 [patent_title] => 'CHEMFET operation without a reference electrode' [patent_app_type] => 1 [patent_app_number] => 6/771974 [patent_app_country] => US [patent_app_date] => 1985-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 4864 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/716/04716448.pdf [firstpage_image] =>[orig_patent_app_number] => 771974 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/771974
CHEMFET operation without a reference electrode Sep 2, 1985 Issued
Array ( [id] => 2303594 [patent_doc_number] => 04682203 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-07-21 [patent_title] => 'Solid-state image pickup device with photographic sensitivity characteristics' [patent_app_type] => 1 [patent_app_number] => 6/766335 [patent_app_country] => US [patent_app_date] => 1985-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2718 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/682/04682203.pdf [firstpage_image] =>[orig_patent_app_number] => 766335 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/766335
Solid-state image pickup device with photographic sensitivity characteristics Aug 15, 1985 Issued
Array ( [id] => 2425963 [patent_doc_number] => 04727409 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-02-23 [patent_title] => 'Programmable read-only memory formed with opposing PN diodes' [patent_app_type] => 1 [patent_app_number] => 6/763063 [patent_app_country] => US [patent_app_date] => 1985-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 16 [patent_no_of_words] => 6908 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/727/04727409.pdf [firstpage_image] =>[orig_patent_app_number] => 763063 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/763063
Programmable read-only memory formed with opposing PN diodes Aug 4, 1985 Issued
Array ( [id] => 2256127 [patent_doc_number] => 04603342 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-07-29 [patent_title] => 'Imaging array having higher sensitivity and a method of making the same' [patent_app_type] => 1 [patent_app_number] => 6/761677 [patent_app_country] => US [patent_app_date] => 1985-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 2458 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/603/04603342.pdf [firstpage_image] =>[orig_patent_app_number] => 761677 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/761677
Imaging array having higher sensitivity and a method of making the same Aug 1, 1985 Issued
Array ( [id] => 2296803 [patent_doc_number] => 04710791 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-12-01 [patent_title] => 'Protection device in an integrated circuit' [patent_app_type] => 1 [patent_app_number] => 6/760368 [patent_app_country] => US [patent_app_date] => 1985-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 4163 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/710/04710791.pdf [firstpage_image] =>[orig_patent_app_number] => 760368 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/760368
Protection device in an integrated circuit Jul 29, 1985 Issued
06/759755 CMOS INTEGRATED CIRCUIT AND PROCESS FOR PRODUCING AN ELECTRIC ISOLATION ZONES IN SAID INTEGRATED CIRCUIT Jul 28, 1985 Abandoned
Array ( [id] => 2350123 [patent_doc_number] => 04656495 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-04-07 [patent_title] => 'Bipolar ram cell and process' [patent_app_type] => 1 [patent_app_number] => 6/750121 [patent_app_country] => US [patent_app_date] => 1985-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 8 [patent_no_of_words] => 3359 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/656/04656495.pdf [firstpage_image] =>[orig_patent_app_number] => 750121 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/750121
Bipolar ram cell and process Jun 30, 1985 Issued
06/747501 HIGH TRANSCONDUCTANCE COMPLEMENTARY (A1,GA)AS/GAAS HETEROSTRUCTURE INSULATED GATE FIELD-EFFECT TRANSISTOR Jun 20, 1985 Abandoned
Array ( [id] => 2315358 [patent_doc_number] => 04675716 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-06-23 [patent_title] => 'Insulator coating for improved step coverage in VLSI devices' [patent_app_type] => 1 [patent_app_number] => 6/741207 [patent_app_country] => US [patent_app_date] => 1985-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3001 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/675/04675716.pdf [firstpage_image] =>[orig_patent_app_number] => 741207 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/741207
Insulator coating for improved step coverage in VLSI devices Jun 3, 1985 Issued
06/740361 SLOT COLLECTOR TRANSISTOR Jun 2, 1985 Abandoned
Array ( [id] => 2451140 [patent_doc_number] => 04740822 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-04-26 [patent_title] => 'Field effect device maintaining a high speed operation in a high voltage operation' [patent_app_type] => 1 [patent_app_number] => 6/724456 [patent_app_country] => US [patent_app_date] => 1985-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3547 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/740/04740822.pdf [firstpage_image] =>[orig_patent_app_number] => 724456 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/724456
Field effect device maintaining a high speed operation in a high voltage operation Apr 17, 1985 Issued
Array ( [id] => 2389563 [patent_doc_number] => 04695865 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-09-22 [patent_title] => 'Integrated logic circuit having insulated gate field effect transistors' [patent_app_type] => 1 [patent_app_number] => 6/719950 [patent_app_country] => US [patent_app_date] => 1985-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 8897 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/695/04695865.pdf [firstpage_image] =>[orig_patent_app_number] => 719950 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/719950
Integrated logic circuit having insulated gate field effect transistors Apr 3, 1985 Issued
06/719742 THIN-FILM AND ITS FORMING METHOD Apr 3, 1985 Abandoned
Array ( [id] => 2560615 [patent_doc_number] => 04803539 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-02-07 [patent_title] => 'Dopant control of metal silicide formation' [patent_app_type] => 1 [patent_app_number] => 6/717984 [patent_app_country] => US [patent_app_date] => 1985-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 7297 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/803/04803539.pdf [firstpage_image] =>[orig_patent_app_number] => 717984 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/717984
Dopant control of metal silicide formation Mar 28, 1985 Issued
06/714286 OPPOSED DUAL-GATED HYBRID STRUCTURE FOR THREE-DIMENSIONAL INTEGRATED CIRCUITS Mar 20, 1985 Abandoned
06/711540 METHOD FOR FORMING A VOID FREE ISOLATION PATTERN AND RESULATING STRUCTURE Mar 12, 1985 Abandoned
06/702562 READ ONLY MEMORY WITH IMPROVED CHANNEL LENGTH CONTROL AND METHOD OF FORMING Feb 18, 1985 Abandoned
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