Search

Kriellion Antionette Sanders

Examiner (ID: 8649)

Most Active Art Unit
1714
Art Unit(s)
1761, 1768, 1503, 1511, 1714, 1796, 1509
Total Applications
2736
Issued Applications
2061
Pending Applications
79
Abandoned Applications
597

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 191245 [patent_doc_number] => 07642557 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-01-05 [patent_title] => 'Non-contact pumping of light emitters via non-radiative energy transfer' [patent_app_type] => utility [patent_app_number] => 10/843737 [patent_app_country] => US [patent_app_date] => 2004-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5809 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/642/07642557.pdf [firstpage_image] =>[orig_patent_app_number] => 10843737 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/843737
Non-contact pumping of light emitters via non-radiative energy transfer May 10, 2004 Issued
Array ( [id] => 281701 [patent_doc_number] => 07553700 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-30 [patent_title] => 'Chemical-enhanced package singulation process' [patent_app_type] => utility [patent_app_number] => 10/843867 [patent_app_country] => US [patent_app_date] => 2004-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 22 [patent_no_of_words] => 3189 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/553/07553700.pdf [firstpage_image] =>[orig_patent_app_number] => 10843867 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/843867
Chemical-enhanced package singulation process May 10, 2004 Issued
Array ( [id] => 513260 [patent_doc_number] => 07196401 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-03-27 [patent_title] => 'Chip-packaging with bonding options having a plurality of package substrates' [patent_app_type] => utility [patent_app_number] => 10/709427 [patent_app_country] => US [patent_app_date] => 2004-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3050 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/196/07196401.pdf [firstpage_image] =>[orig_patent_app_number] => 10709427 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/709427
Chip-packaging with bonding options having a plurality of package substrates May 4, 2004 Issued
Array ( [id] => 7404864 [patent_doc_number] => 20040262704 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-30 [patent_title] => 'Semiconductor package with an optical sensor which may be fit inside an object' [patent_app_type] => new [patent_app_number] => 10/825077 [patent_app_country] => US [patent_app_date] => 2004-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1551 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0262/20040262704.pdf [firstpage_image] =>[orig_patent_app_number] => 10825077 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/825077
Semiconductor package with an optical sensor which may be fit inside an object Apr 14, 2004 Issued
Array ( [id] => 638251 [patent_doc_number] => 07126168 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-10-24 [patent_title] => 'Silicon controlled rectifier structures with reduced turn on times' [patent_app_type] => utility [patent_app_number] => 10/821287 [patent_app_country] => US [patent_app_date] => 2004-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 24 [patent_no_of_words] => 8629 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/126/07126168.pdf [firstpage_image] =>[orig_patent_app_number] => 10821287 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/821287
Silicon controlled rectifier structures with reduced turn on times Apr 8, 2004 Issued
Array ( [id] => 6949749 [patent_doc_number] => 20050224843 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-13 [patent_title] => 'High dynamic range pixel amplifier' [patent_app_type] => utility [patent_app_number] => 10/819167 [patent_app_country] => US [patent_app_date] => 2004-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 6766 [patent_no_of_claims] => 81 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0224/20050224843.pdf [firstpage_image] =>[orig_patent_app_number] => 10819167 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/819167
High dynamic range pixel amplifier Apr 6, 2004 Issued
Array ( [id] => 759370 [patent_doc_number] => 07015567 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-03-21 [patent_title] => 'Method for fabricating a semiconductor structure using a protective layer, and semiconductor structure' [patent_app_type] => utility [patent_app_number] => 10/815407 [patent_app_country] => US [patent_app_date] => 2004-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 4986 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/015/07015567.pdf [firstpage_image] =>[orig_patent_app_number] => 10815407 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/815407
Method for fabricating a semiconductor structure using a protective layer, and semiconductor structure Mar 31, 2004 Issued
Array ( [id] => 7609505 [patent_doc_number] => 06998684 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-02-14 [patent_title] => 'High mobility plane CMOS SOI' [patent_app_type] => utility [patent_app_number] => 10/708907 [patent_app_country] => US [patent_app_date] => 2004-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 42 [patent_no_of_words] => 7513 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/998/06998684.pdf [firstpage_image] =>[orig_patent_app_number] => 10708907 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/708907
High mobility plane CMOS SOI Mar 30, 2004 Issued
Array ( [id] => 751736 [patent_doc_number] => 07023037 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-04 [patent_title] => 'Integrated circuit devices having dielectric regions protected with multi-layer insulation structures' [patent_app_type] => utility [patent_app_number] => 10/813335 [patent_app_country] => US [patent_app_date] => 2004-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 11027 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/023/07023037.pdf [firstpage_image] =>[orig_patent_app_number] => 10813335 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/813335
Integrated circuit devices having dielectric regions protected with multi-layer insulation structures Mar 29, 2004 Issued
Array ( [id] => 7036767 [patent_doc_number] => 20050156201 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-21 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/807247 [patent_app_country] => US [patent_app_date] => 2004-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3908 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0156/20050156201.pdf [firstpage_image] =>[orig_patent_app_number] => 10807247 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/807247
Semiconductor device Mar 23, 2004 Issued
Array ( [id] => 6955688 [patent_doc_number] => 20050212058 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-29 [patent_title] => 'Resistance-reduced semiconductor device and fabrication thereof' [patent_app_type] => utility [patent_app_number] => 10/806217 [patent_app_country] => US [patent_app_date] => 2004-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2212 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0212/20050212058.pdf [firstpage_image] =>[orig_patent_app_number] => 10806217 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/806217
Resistance-reduced semiconductor device and fabrication thereof Mar 22, 2004 Abandoned
Array ( [id] => 691955 [patent_doc_number] => 07075125 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-11 [patent_title] => 'Power semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/806397 [patent_app_country] => US [patent_app_date] => 2004-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 6881 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/075/07075125.pdf [firstpage_image] =>[orig_patent_app_number] => 10806397 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/806397
Power semiconductor device Mar 22, 2004 Issued
Array ( [id] => 7016458 [patent_doc_number] => 20050218475 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-06 [patent_title] => 'Low power fuse structure and method for making the same' [patent_app_type] => utility [patent_app_number] => 10/805747 [patent_app_country] => US [patent_app_date] => 2004-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1249 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0218/20050218475.pdf [firstpage_image] =>[orig_patent_app_number] => 10805747 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/805747
Low power fuse structure and method of making the same Mar 21, 2004 Issued
Array ( [id] => 503047 [patent_doc_number] => 07205611 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-17 [patent_title] => 'Semiconductor device including a protection circuit' [patent_app_type] => utility [patent_app_number] => 10/805040 [patent_app_country] => US [patent_app_date] => 2004-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 10812 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/205/07205611.pdf [firstpage_image] =>[orig_patent_app_number] => 10805040 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/805040
Semiconductor device including a protection circuit Mar 17, 2004 Issued
Array ( [id] => 756229 [patent_doc_number] => 07019348 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-03-28 [patent_title] => 'Embedded semiconductor product with dual depth isolation regions' [patent_app_type] => utility [patent_app_number] => 10/789527 [patent_app_country] => US [patent_app_date] => 2004-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 2159 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/019/07019348.pdf [firstpage_image] =>[orig_patent_app_number] => 10789527 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/789527
Embedded semiconductor product with dual depth isolation regions Feb 25, 2004 Issued
Array ( [id] => 682990 [patent_doc_number] => 07081641 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-25 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 10/786097 [patent_app_country] => US [patent_app_date] => 2004-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 5022 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/081/07081641.pdf [firstpage_image] =>[orig_patent_app_number] => 10786097 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/786097
Semiconductor device and manufacturing method thereof Feb 25, 2004 Issued
Array ( [id] => 7447656 [patent_doc_number] => 20040164312 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-26 [patent_title] => 'Method of fabricating semiconductor device and semiconductor device' [patent_app_type] => new [patent_app_number] => 10/786667 [patent_app_country] => US [patent_app_date] => 2004-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 8337 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20040164312.pdf [firstpage_image] =>[orig_patent_app_number] => 10786667 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/786667
Method of fabricating semiconductor device and semiconductor device Feb 24, 2004 Issued
Array ( [id] => 664043 [patent_doc_number] => 07102155 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-09-05 [patent_title] => 'Electrode substrate, thin film transistor, display device and their production' [patent_app_type] => utility [patent_app_number] => 10/786567 [patent_app_country] => US [patent_app_date] => 2004-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 12223 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/102/07102155.pdf [firstpage_image] =>[orig_patent_app_number] => 10786567 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/786567
Electrode substrate, thin film transistor, display device and their production Feb 24, 2004 Issued
Array ( [id] => 944316 [patent_doc_number] => 06967370 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-11-22 [patent_title] => 'Integrated semiconductor circuit having a multiplicity of memory cells' [patent_app_type] => utility [patent_app_number] => 10/785087 [patent_app_country] => US [patent_app_date] => 2004-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2947 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/967/06967370.pdf [firstpage_image] =>[orig_patent_app_number] => 10785087 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/785087
Integrated semiconductor circuit having a multiplicity of memory cells Feb 24, 2004 Issued
Array ( [id] => 7448291 [patent_doc_number] => 20040164378 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-26 [patent_title] => 'Method for fabricating an NPN transistor in a BICMOS technology' [patent_app_type] => new [patent_app_number] => 10/785667 [patent_app_country] => US [patent_app_date] => 2004-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3241 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20040164378.pdf [firstpage_image] =>[orig_patent_app_number] => 10785667 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/785667
Method for fabricating an NPN transistor in a BICMOS technology Feb 23, 2004 Issued
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