Search

Kriellion Antionette Sanders

Examiner (ID: 8649)

Most Active Art Unit
1714
Art Unit(s)
1761, 1768, 1503, 1511, 1714, 1796, 1509
Total Applications
2736
Issued Applications
2061
Pending Applications
79
Abandoned Applications
597

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4282678 [patent_doc_number] => 06281564 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-28 [patent_title] => 'Programmable integrated passive devices' [patent_app_type] => 1 [patent_app_number] => 9/437587 [patent_app_country] => US [patent_app_date] => 1999-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 3975 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/281/06281564.pdf [firstpage_image] =>[orig_patent_app_number] => 437587 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/437587
Programmable integrated passive devices Nov 8, 1999 Issued
Array ( [id] => 189286 [patent_doc_number] => RE041068 [patent_country] => US [patent_kind] => E1 [patent_issue_date] => 2010-01-05 [patent_title] => 'Spacer-type thin-film polysilicon transistor for low-power memory devices' [patent_app_type] => reissue [patent_app_number] => 09/968977 [patent_app_country] => US [patent_app_date] => 1999-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 25 [patent_no_of_words] => 3699 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/041/RE041068.pdf [firstpage_image] =>[orig_patent_app_number] => 09968977 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/968977
Spacer-type thin-film polysilicon transistor for low-power memory devices Oct 28, 1999 Issued
Array ( [id] => 1433545 [patent_doc_number] => 06340835 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-22 [patent_title] => 'Method of making a resistor, method of making a diode, and SRAM circuitry and other integrated circuitry' [patent_app_type] => B1 [patent_app_number] => 09/526796 [patent_app_country] => US [patent_app_date] => 1999-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2523 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/340/06340835.pdf [firstpage_image] =>[orig_patent_app_number] => 09526796 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/526796
Method of making a resistor, method of making a diode, and SRAM circuitry and other integrated circuitry Oct 6, 1999 Issued
Array ( [id] => 1351880 [patent_doc_number] => 06580127 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-17 [patent_title] => 'High performance thin film transistor and active matrix process for flat panel displays' [patent_app_type] => B1 [patent_app_number] => 09/409157 [patent_app_country] => US [patent_app_date] => 1999-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 19 [patent_no_of_words] => 5693 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/580/06580127.pdf [firstpage_image] =>[orig_patent_app_number] => 09409157 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/409157
High performance thin film transistor and active matrix process for flat panel displays Sep 29, 1999 Issued
Array ( [id] => 1459968 [patent_doc_number] => 06426561 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-30 [patent_title] => 'Short-circuit-resistant IGBT module' [patent_app_type] => B1 [patent_app_number] => 09/394717 [patent_app_country] => US [patent_app_date] => 1999-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1766 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/426/06426561.pdf [firstpage_image] =>[orig_patent_app_number] => 09394717 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/394717
Short-circuit-resistant IGBT module Sep 12, 1999 Issued
Array ( [id] => 4410655 [patent_doc_number] => 06271560 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-07 [patent_title] => 'Single-poly EPROM cell with CMOS compatible programming voltages' [patent_app_type] => 1 [patent_app_number] => 9/393617 [patent_app_country] => US [patent_app_date] => 1999-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3725 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 285 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/271/06271560.pdf [firstpage_image] =>[orig_patent_app_number] => 393617 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/393617
Single-poly EPROM cell with CMOS compatible programming voltages Sep 9, 1999 Issued
Array ( [id] => 4254895 [patent_doc_number] => 06222257 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-24 [patent_title] => 'Etch stop for use in etching of silicon oxide' [patent_app_type] => 1 [patent_app_number] => 9/370080 [patent_app_country] => US [patent_app_date] => 1999-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3932 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/222/06222257.pdf [firstpage_image] =>[orig_patent_app_number] => 370080 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/370080
Etch stop for use in etching of silicon oxide Aug 5, 1999 Issued
Array ( [id] => 4274837 [patent_doc_number] => 06307222 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-23 [patent_title] => 'Power/ground metallization routing in a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/368074 [patent_app_country] => US [patent_app_date] => 1999-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 2956 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/307/06307222.pdf [firstpage_image] =>[orig_patent_app_number] => 368074 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/368074
Power/ground metallization routing in a semiconductor device Aug 2, 1999 Issued
Array ( [id] => 6811737 [patent_doc_number] => 20030071287 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-17 [patent_title] => 'SCRATCH RESISTANCE IMPROVEMENT BY FILLING METAL GAPS' [patent_app_type] => new [patent_app_number] => 09/364307 [patent_app_country] => US [patent_app_date] => 1999-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2416 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0071/20030071287.pdf [firstpage_image] =>[orig_patent_app_number] => 09364307 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/364307
Scratch resistance improvement by filling metal gaps Jul 29, 1999 Issued
Array ( [id] => 4358732 [patent_doc_number] => 06291848 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-18 [patent_title] => 'Integrated circuit capacitor including anchored plugs' [patent_app_type] => 1 [patent_app_number] => 9/364767 [patent_app_country] => US [patent_app_date] => 1999-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4564 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/291/06291848.pdf [firstpage_image] =>[orig_patent_app_number] => 364767 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/364767
Integrated circuit capacitor including anchored plugs Jul 29, 1999 Issued
Array ( [id] => 1547531 [patent_doc_number] => 06445059 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-03 [patent_title] => 'Semiconductor device' [patent_app_type] => B1 [patent_app_number] => 09/362810 [patent_app_country] => US [patent_app_date] => 1999-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 20 [patent_no_of_words] => 5777 [patent_no_of_claims] => 60 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/445/06445059.pdf [firstpage_image] =>[orig_patent_app_number] => 09362810 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/362810
Semiconductor device Jul 27, 1999 Issued
Array ( [id] => 1524858 [patent_doc_number] => 06353243 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-05 [patent_title] => 'Process for manufacturing an integrated circuit comprising an array of memory cells' [patent_app_type] => B1 [patent_app_number] => 09/356080 [patent_app_country] => US [patent_app_date] => 1999-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 18 [patent_no_of_words] => 5285 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/353/06353243.pdf [firstpage_image] =>[orig_patent_app_number] => 09356080 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/356080
Process for manufacturing an integrated circuit comprising an array of memory cells Jul 15, 1999 Issued
Array ( [id] => 4333461 [patent_doc_number] => 06320225 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-20 [patent_title] => 'SOI CMOS body contact through gate, self-aligned to source- drain diffusions' [patent_app_type] => 1 [patent_app_number] => 9/351647 [patent_app_country] => US [patent_app_date] => 1999-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 3218 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/320/06320225.pdf [firstpage_image] =>[orig_patent_app_number] => 351647 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/351647
SOI CMOS body contact through gate, self-aligned to source- drain diffusions Jul 12, 1999 Issued
Array ( [id] => 1550899 [patent_doc_number] => 06346722 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-12 [patent_title] => 'Solid state imaging device and method for manufacturing the same' [patent_app_type] => B1 [patent_app_number] => 09/340127 [patent_app_country] => US [patent_app_date] => 1999-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 121 [patent_no_of_words] => 11071 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/346/06346722.pdf [firstpage_image] =>[orig_patent_app_number] => 09340127 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/340127
Solid state imaging device and method for manufacturing the same Jun 27, 1999 Issued
09/338170 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Jun 21, 1999 Abandoned
Array ( [id] => 4190871 [patent_doc_number] => 06160317 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-12 [patent_title] => 'Method of spacer formation and source protection after self-aligned source formed and a device provided by such a method' [patent_app_type] => 1 [patent_app_number] => 9/336057 [patent_app_country] => US [patent_app_date] => 1999-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 21 [patent_no_of_words] => 3303 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/160/06160317.pdf [firstpage_image] =>[orig_patent_app_number] => 336057 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/336057
Method of spacer formation and source protection after self-aligned source formed and a device provided by such a method Jun 17, 1999 Issued
Array ( [id] => 5981929 [patent_doc_number] => 20020096704 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-25 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => new [patent_app_number] => 09/333687 [patent_app_country] => US [patent_app_date] => 1999-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 3380 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0096/20020096704.pdf [firstpage_image] =>[orig_patent_app_number] => 09333687 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/333687
Nonvolatile semiconductor memory device and method of manufacturing the same Jun 15, 1999 Issued
Array ( [id] => 4331393 [patent_doc_number] => 06329677 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-11 [patent_title] => 'Field effect transistor' [patent_app_type] => 1 [patent_app_number] => 9/330087 [patent_app_country] => US [patent_app_date] => 1999-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 22 [patent_no_of_words] => 8202 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 314 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/329/06329677.pdf [firstpage_image] =>[orig_patent_app_number] => 330087 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/330087
Field effect transistor Jun 10, 1999 Issued
Array ( [id] => 4324890 [patent_doc_number] => 06249038 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-19 [patent_title] => 'Method and structure for a semiconductor fuse' [patent_app_type] => 1 [patent_app_number] => 9/326437 [patent_app_country] => US [patent_app_date] => 1999-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 17 [patent_no_of_words] => 3276 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/249/06249038.pdf [firstpage_image] =>[orig_patent_app_number] => 326437 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/326437
Method and structure for a semiconductor fuse Jun 3, 1999 Issued
Array ( [id] => 1561636 [patent_doc_number] => 06437367 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-20 [patent_title] => 'Electro-optical device and method for driving the same' [patent_app_type] => B1 [patent_app_number] => 09/315987 [patent_app_country] => US [patent_app_date] => 1999-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 50 [patent_no_of_words] => 11367 [patent_no_of_claims] => 163 [patent_no_of_ind_claims] => 20 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/437/06437367.pdf [firstpage_image] =>[orig_patent_app_number] => 09315987 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/315987
Electro-optical device and method for driving the same May 20, 1999 Issued
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