Kriellion Antionette Sanders

Array ( [id] => 1476324 [patent_doc_number] => 06388296 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-14 [patent_title] => 'CMOS self-aligned strapped interconnection' [patent_app_type] => B1 [patent_app_number] => 09/257217 [patent_app_country] => US [patent_app_date] => 1999-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 4482 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/388/06388296.pdf [firstpage_image] =>[orig_patent_app_number] => 09257217 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1441944 [patent_doc_number] => 06335540 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-01 [patent_title] => 'Semiconductor device and process for fabricating the same' [patent_app_type] => B1 [patent_app_number] => 09/252000 [patent_app_country] => US [patent_app_date] => 1999-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 3724 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/335/06335540.pdf [firstpage_image] =>[orig_patent_app_number] => 09252000 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5964575 [patent_doc_number] => 20020089022 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-11 [patent_title] => 'SEMICONDUCTOR ARRANGEMENT WITH TRANSISTOR GATE INSULATOR' [patent_app_type] => new [patent_app_number] => 09/250590 [patent_app_country] => US [patent_app_date] => 1999-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1949 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0089/20020089022.pdf [firstpage_image] =>[orig_patent_app_number] => 09250590 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4257326 [patent_doc_number] => 06207993 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-27 [patent_title] => 'Field effect semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/250726 [patent_app_country] => US [patent_app_date] => 1999-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 23 [patent_no_of_words] => 9160 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 318 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/207/06207993.pdf [firstpage_image] =>[orig_patent_app_number] => 250726 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6028777 [patent_doc_number] => 20020017693 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-02-14 [patent_title] => 'MOSCAP DESIGN FOR IMPROVED RELIABILITY' [patent_app_type] => new [patent_app_number] => 09/247275 [patent_app_country] => US [patent_app_date] => 1999-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2940 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0017/20020017693.pdf [firstpage_image] =>[orig_patent_app_number] => 09247275 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4412774 [patent_doc_number] => 06239461 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-29 [patent_title] => 'Semiconductor device capacitor having a recessed contact plug' [patent_app_type] => 1 [patent_app_number] => 9/245777 [patent_app_country] => US [patent_app_date] => 1999-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 14 [patent_no_of_words] => 4890 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/239/06239461.pdf [firstpage_image] =>[orig_patent_app_number] => 245777 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4257110 [patent_doc_number] => 06207980 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-27 [patent_title] => 'Layout method of a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/241847 [patent_app_country] => US [patent_app_date] => 1999-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3232 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/207/06207980.pdf [firstpage_image] =>[orig_patent_app_number] => 241847 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1420700 [patent_doc_number] => 06521947 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-18 [patent_title] => 'Method of integrating substrate contact on SOI wafers with STI process' [patent_app_type] => B1 [patent_app_number] => 09/239327 [patent_app_country] => US [patent_app_date] => 1999-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 2865 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/521/06521947.pdf [firstpage_image] =>[orig_patent_app_number] => 09239327 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4113343 [patent_doc_number] => 06057581 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-02 [patent_title] => 'Self-aligned contacts' [patent_app_type] => 1 [patent_app_number] => 9/239577 [patent_app_country] => US [patent_app_date] => 1999-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 16 [patent_no_of_words] => 4739 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/057/06057581.pdf [firstpage_image] =>[orig_patent_app_number] => 239577 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7643545 [patent_doc_number] => 06429496 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-06 [patent_title] => 'Ion-assisted oxidation methods and the resulting structures' [patent_app_type] => B1 [patent_app_number] => 09/237004 [patent_app_country] => US [patent_app_date] => 1999-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2770 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/429/06429496.pdf [firstpage_image] =>[orig_patent_app_number] => 09237004 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1516173 [patent_doc_number] => 06420761 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-16 [patent_title] => 'Asymmetrical semiconductor device for ESD protection' [patent_app_type] => B1 [patent_app_number] => 09/233797 [patent_app_country] => US [patent_app_date] => 1999-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3209 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/420/06420761.pdf [firstpage_image] =>[orig_patent_app_number] => 09233797 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1421164 [patent_doc_number] => 06509599 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-21 [patent_title] => 'Trench capacitor with insulation collar and method for producing the trench capacitor' [patent_app_type] => B1 [patent_app_number] => 09/232081 [patent_app_country] => US [patent_app_date] => 1999-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 23 [patent_no_of_words] => 10998 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/509/06509599.pdf [firstpage_image] =>[orig_patent_app_number] => 09232081 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4264828 [patent_doc_number] => 06204538 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-20 [patent_title] => 'SRAM cell' [patent_app_type] => 1 [patent_app_number] => 9/232869 [patent_app_country] => US [patent_app_date] => 1999-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2967 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/204/06204538.pdf [firstpage_image] =>[orig_patent_app_number] => 232869 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1509222 [patent_doc_number] => 06441399 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-27 [patent_title] => 'Semiconductor integrated system' [patent_app_type] => B1 [patent_app_number] => 09/229677 [patent_app_country] => US [patent_app_date] => 1999-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 23 [patent_no_of_words] => 5937 [patent_no_of_claims] => 56 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/441/06441399.pdf [firstpage_image] =>[orig_patent_app_number] => 09229677 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1550918 [patent_doc_number] => 06346727 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-12 [patent_title] => 'Semiconductor device having optimized two-dimensional array of double diffused MOS field effect transistors' [patent_app_type] => B1 [patent_app_number] => 09/226110 [patent_app_country] => US [patent_app_date] => 1999-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 30 [patent_no_of_words] => 11881 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/346/06346727.pdf [firstpage_image] =>[orig_patent_app_number] => 09226110 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4361015 [patent_doc_number] => 06201273 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-13 [patent_title] => 'Structure for a double wall tub shaped capacitor' [patent_app_type] => 1 [patent_app_number] => 9/225668 [patent_app_country] => US [patent_app_date] => 1999-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 5573 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/201/06201273.pdf [firstpage_image] =>[orig_patent_app_number] => 225668 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1547399 [patent_doc_number] => 06445028 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-03 [patent_title] => 'Semiconductor device and method of fabricating the same' [patent_app_type] => B1 [patent_app_number] => 09/225547 [patent_app_country] => US [patent_app_date] => 1999-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 40 [patent_no_of_words] => 6346 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/445/06445028.pdf [firstpage_image] =>[orig_patent_app_number] => 09225547 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4317856 [patent_doc_number] => 06316807 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-13 [patent_title] => 'Low on-resistance trench lateral MISFET with better switching characteristics and method for manufacturing same' [patent_app_type] => 1 [patent_app_number] => 9/224605 [patent_app_country] => US [patent_app_date] => 1998-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 49 [patent_no_of_words] => 6032 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/316/06316807.pdf [firstpage_image] =>[orig_patent_app_number] => 224605 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1441996 [patent_doc_number] => 06335556 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-01 [patent_title] => 'Semiconductor device and method for manufacturing semiconductor device' [patent_app_type] => B1 [patent_app_number] => 09/222877 [patent_app_country] => US [patent_app_date] => 1998-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 3789 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/335/06335556.pdf [firstpage_image] =>[orig_patent_app_number] => 09222877 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1566271 [patent_doc_number] => 06339246 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-15 [patent_title] => 'Tungsten silicide nitride as an electrode for tantalum pentoxide devices' [patent_app_type] => B1 [patent_app_number] => 09/209787 [patent_app_country] => US [patent_app_date] => 1998-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 1951 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/339/06339246.pdf [firstpage_image] =>[orig_patent_app_number] => 09209787 [rel_patent_id] =>[rel_patent_doc_number] =>)