Search

Kriellion Antionette Sanders

Examiner (ID: 8649)

Most Active Art Unit
1714
Art Unit(s)
1761, 1768, 1503, 1511, 1714, 1796, 1509
Total Applications
2736
Issued Applications
2061
Pending Applications
79
Abandoned Applications
597

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4360835 [patent_doc_number] => 06201260 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-13 [patent_title] => 'Thin film transistor and method of manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 9/152253 [patent_app_country] => US [patent_app_date] => 1998-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 5471 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/201/06201260.pdf [firstpage_image] =>[orig_patent_app_number] => 152253 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/152253
Thin film transistor and method of manufacturing the same Sep 13, 1998 Issued
Array ( [id] => 4297492 [patent_doc_number] => 06236093 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-22 [patent_title] => 'Semiconductor device including gate electrode having polymetal structure and method of manufacturing of the same' [patent_app_type] => 1 [patent_app_number] => 9/151657 [patent_app_country] => US [patent_app_date] => 1998-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 25 [patent_no_of_words] => 5800 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/236/06236093.pdf [firstpage_image] =>[orig_patent_app_number] => 151657 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/151657
Semiconductor device including gate electrode having polymetal structure and method of manufacturing of the same Sep 10, 1998 Issued
Array ( [id] => 4089610 [patent_doc_number] => 06163059 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-19 [patent_title] => 'Integrated circuit including source implant self-aligned to contact via' [patent_app_type] => 1 [patent_app_number] => 9/148127 [patent_app_country] => US [patent_app_date] => 1998-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 18 [patent_no_of_words] => 7963 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/163/06163059.pdf [firstpage_image] =>[orig_patent_app_number] => 148127 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/148127
Integrated circuit including source implant self-aligned to contact via Sep 3, 1998 Issued
Array ( [id] => 4209674 [patent_doc_number] => 06078063 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-20 [patent_title] => 'Light-emitting gallium nitride-based compound semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/145972 [patent_app_country] => US [patent_app_date] => 1998-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 12336 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/078/06078063.pdf [firstpage_image] =>[orig_patent_app_number] => 145972 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/145972
Light-emitting gallium nitride-based compound semiconductor device Sep 2, 1998 Issued
Array ( [id] => 4277832 [patent_doc_number] => 06323524 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-27 [patent_title] => 'Semiconductor device having a vertical active region and method of manufacture thereof' [patent_app_type] => 1 [patent_app_number] => 9/143480 [patent_app_country] => US [patent_app_date] => 1998-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 17 [patent_no_of_words] => 2642 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/323/06323524.pdf [firstpage_image] =>[orig_patent_app_number] => 143480 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/143480
Semiconductor device having a vertical active region and method of manufacture thereof Aug 27, 1998 Issued
Array ( [id] => 4318026 [patent_doc_number] => 06316820 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-13 [patent_title] => 'Passivation layer and process for semiconductor devices' [patent_app_type] => 1 [patent_app_number] => 9/143680 [patent_app_country] => US [patent_app_date] => 1998-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 4730 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/316/06316820.pdf [firstpage_image] =>[orig_patent_app_number] => 143680 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/143680
Passivation layer and process for semiconductor devices Aug 27, 1998 Issued
Array ( [id] => 4197560 [patent_doc_number] => 06043541 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-28 [patent_title] => 'Bipolar-CMOS (BiCMOS) process for fabricating integrated circuits' [patent_app_type] => 1 [patent_app_number] => 9/140497 [patent_app_country] => US [patent_app_date] => 1998-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3941 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/043/06043541.pdf [firstpage_image] =>[orig_patent_app_number] => 140497 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/140497
Bipolar-CMOS (BiCMOS) process for fabricating integrated circuits Aug 26, 1998 Issued
Array ( [id] => 4197469 [patent_doc_number] => 06043535 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-28 [patent_title] => 'Self-aligned implant under transistor gate' [patent_app_type] => 1 [patent_app_number] => 9/140267 [patent_app_country] => US [patent_app_date] => 1998-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 4073 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/043/06043535.pdf [firstpage_image] =>[orig_patent_app_number] => 140267 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/140267
Self-aligned implant under transistor gate Aug 25, 1998 Issued
Array ( [id] => 4387228 [patent_doc_number] => 06294808 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-25 [patent_title] => 'Non-volatile memory cell with field-enhancing floating gate and method for forming the same' [patent_app_type] => 1 [patent_app_number] => 9/140540 [patent_app_country] => US [patent_app_date] => 1998-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 2701 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/294/06294808.pdf [firstpage_image] =>[orig_patent_app_number] => 140540 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/140540
Non-volatile memory cell with field-enhancing floating gate and method for forming the same Aug 25, 1998 Issued
Array ( [id] => 4238959 [patent_doc_number] => 06075258 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-13 [patent_title] => 'Elevated transistor fabrication technique' [patent_app_type] => 1 [patent_app_number] => 9/136177 [patent_app_country] => US [patent_app_date] => 1998-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 3153 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/075/06075258.pdf [firstpage_image] =>[orig_patent_app_number] => 136177 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/136177
Elevated transistor fabrication technique Aug 18, 1998 Issued
Array ( [id] => 4196254 [patent_doc_number] => 06130452 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-10 [patent_title] => 'Virtual ground flash cell with asymmetrically placed source and drain and method of fabrication' [patent_app_type] => 1 [patent_app_number] => 9/134747 [patent_app_country] => US [patent_app_date] => 1998-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 5313 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/130/06130452.pdf [firstpage_image] =>[orig_patent_app_number] => 134747 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/134747
Virtual ground flash cell with asymmetrically placed source and drain and method of fabrication Aug 13, 1998 Issued
Array ( [id] => 4297330 [patent_doc_number] => 06236082 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-22 [patent_title] => 'Floating gate semiconductor device with reduced erase voltage' [patent_app_type] => 1 [patent_app_number] => 9/134480 [patent_app_country] => US [patent_app_date] => 1998-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 5190 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/236/06236082.pdf [firstpage_image] =>[orig_patent_app_number] => 134480 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/134480
Floating gate semiconductor device with reduced erase voltage Aug 12, 1998 Issued
Array ( [id] => 4401642 [patent_doc_number] => 06297557 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-02 [patent_title] => 'Reliable aluminum interconnect via structures' [patent_app_type] => 1 [patent_app_number] => 9/134070 [patent_app_country] => US [patent_app_date] => 1998-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 4736 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/297/06297557.pdf [firstpage_image] =>[orig_patent_app_number] => 134070 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/134070
Reliable aluminum interconnect via structures Aug 12, 1998 Issued
Array ( [id] => 1132518 [patent_doc_number] => 06787883 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-09-07 [patent_title] => 'Silicon-germanium devices for CMOS formed by ion implantation and solid phase epitaxial regrowth' [patent_app_type] => B1 [patent_app_number] => 09/132157 [patent_app_country] => US [patent_app_date] => 1998-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1917 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/787/06787883.pdf [firstpage_image] =>[orig_patent_app_number] => 09132157 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/132157
Silicon-germanium devices for CMOS formed by ion implantation and solid phase epitaxial regrowth Aug 10, 1998 Issued
Array ( [id] => 4363583 [patent_doc_number] => 06169312 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-02 [patent_title] => 'Static protection circuit for use in a semiconductor integrated circuit device' [patent_app_type] => 1 [patent_app_number] => 9/128470 [patent_app_country] => US [patent_app_date] => 1998-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 2666 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/169/06169312.pdf [firstpage_image] =>[orig_patent_app_number] => 128470 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/128470
Static protection circuit for use in a semiconductor integrated circuit device Aug 3, 1998 Issued
Array ( [id] => 1480528 [patent_doc_number] => 06452231 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-17 [patent_title] => 'Semiconductor device' [patent_app_type] => B1 [patent_app_number] => 09/126777 [patent_app_country] => US [patent_app_date] => 1998-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 78 [patent_no_of_words] => 11610 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/452/06452231.pdf [firstpage_image] =>[orig_patent_app_number] => 09126777 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/126777
Semiconductor device Jul 30, 1998 Issued
Array ( [id] => 4162743 [patent_doc_number] => 06157063 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-05 [patent_title] => 'MOS field effect transistor with an improved lightly doped diffusion layer structure and method of forming the same' [patent_app_type] => 1 [patent_app_number] => 9/121897 [patent_app_country] => US [patent_app_date] => 1998-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 38 [patent_no_of_words] => 19187 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/157/06157063.pdf [firstpage_image] =>[orig_patent_app_number] => 121897 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/121897
MOS field effect transistor with an improved lightly doped diffusion layer structure and method of forming the same Jul 23, 1998 Issued
Array ( [id] => 4254640 [patent_doc_number] => 06222240 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-24 [patent_title] => 'Salicide and gate dielectric formed from a single layer of refractory metal' [patent_app_type] => 1 [patent_app_number] => 9/120557 [patent_app_country] => US [patent_app_date] => 1998-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 16 [patent_no_of_words] => 4685 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/222/06222240.pdf [firstpage_image] =>[orig_patent_app_number] => 120557 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/120557
Salicide and gate dielectric formed from a single layer of refractory metal Jul 21, 1998 Issued
Array ( [id] => 4037847 [patent_doc_number] => 05994734 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-30 [patent_title] => 'Modified gate structure for non-volatile memory and its method of fabricating the same' [patent_app_type] => 1 [patent_app_number] => 9/120490 [patent_app_country] => US [patent_app_date] => 1998-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 1787 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/994/05994734.pdf [firstpage_image] =>[orig_patent_app_number] => 120490 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/120490
Modified gate structure for non-volatile memory and its method of fabricating the same Jul 20, 1998 Issued
Array ( [id] => 4103117 [patent_doc_number] => 06049114 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-11 [patent_title] => 'Semiconductor device having a metal containing layer overlying a gate dielectric' [patent_app_type] => 1 [patent_app_number] => 9/118877 [patent_app_country] => US [patent_app_date] => 1998-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 2608 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/049/06049114.pdf [firstpage_image] =>[orig_patent_app_number] => 118877 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/118877
Semiconductor device having a metal containing layer overlying a gate dielectric Jul 19, 1998 Issued
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