Search

Kriellion Antionette Sanders

Examiner (ID: 8649)

Most Active Art Unit
1714
Art Unit(s)
1761, 1768, 1503, 1511, 1714, 1796, 1509
Total Applications
2736
Issued Applications
2061
Pending Applications
79
Abandoned Applications
597

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4299878 [patent_doc_number] => 06180983 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-30 [patent_title] => 'High-voltage MOS transistor on a silicon on insulator wafer' [patent_app_type] => 1 [patent_app_number] => 9/118460 [patent_app_country] => US [patent_app_date] => 1998-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 4636 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/180/06180983.pdf [firstpage_image] =>[orig_patent_app_number] => 118460 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/118460
High-voltage MOS transistor on a silicon on insulator wafer Jul 16, 1998 Issued
Array ( [id] => 6897418 [patent_doc_number] => 20010045583 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-29 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE CAPABLE OF PERFORMING STABLE OPERATION FOR NOISE WHILE PREVENTING INCREASE IN CHIP AREA' [patent_app_type] => new [patent_app_number] => 09/116887 [patent_app_country] => US [patent_app_date] => 1998-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 6853 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0045/20010045583.pdf [firstpage_image] =>[orig_patent_app_number] => 09116887 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/116887
Semiconductor memory device capable of performing stable operation for noise while preventing increase in chip area Jul 15, 1998 Issued
Array ( [id] => 1448046 [patent_doc_number] => 06369418 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-09 [patent_title] => 'Formation of a novel DRAM cell' [patent_app_type] => B1 [patent_app_number] => 09/112687 [patent_app_country] => US [patent_app_date] => 1998-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 6542 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/369/06369418.pdf [firstpage_image] =>[orig_patent_app_number] => 09112687 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/112687
Formation of a novel DRAM cell Jul 8, 1998 Issued
Array ( [id] => 4410836 [patent_doc_number] => 06232639 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-15 [patent_title] => 'Method and structure to reduce latch-up using edge implants' [patent_app_type] => 1 [patent_app_number] => 9/107900 [patent_app_country] => US [patent_app_date] => 1998-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 30 [patent_no_of_words] => 9381 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/232/06232639.pdf [firstpage_image] =>[orig_patent_app_number] => 107900 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/107900
Method and structure to reduce latch-up using edge implants Jun 29, 1998 Issued
Array ( [id] => 1448054 [patent_doc_number] => 06369421 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-09 [patent_title] => 'EEPROM having stacked dielectric to increase programming speed' [patent_app_type] => B1 [patent_app_number] => 09/106177 [patent_app_country] => US [patent_app_date] => 1998-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 3656 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/369/06369421.pdf [firstpage_image] =>[orig_patent_app_number] => 09106177 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/106177
EEPROM having stacked dielectric to increase programming speed Jun 28, 1998 Issued
09/106818 METHOD OF MAKING A RESISTOR, METHOD OF MAKING A DIODE, AND SRAM CIRCUITRY AND OTHER INTEGRATED CIRCUITRY Jun 28, 1998 Abandoned
Array ( [id] => 1433544 [patent_doc_number] => 06340834 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-22 [patent_title] => 'Method of making a resistor, method of making a diode, and SRAM circuitry and other integrated circuitry' [patent_app_type] => B1 [patent_app_number] => 09/106992 [patent_app_country] => US [patent_app_date] => 1998-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2551 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/340/06340834.pdf [firstpage_image] =>[orig_patent_app_number] => 09106992 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/106992
Method of making a resistor, method of making a diode, and SRAM circuitry and other integrated circuitry Jun 28, 1998 Issued
Array ( [id] => 4387982 [patent_doc_number] => 06278152 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-21 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 9/105030 [patent_app_country] => US [patent_app_date] => 1998-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 69 [patent_no_of_words] => 14930 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/278/06278152.pdf [firstpage_image] =>[orig_patent_app_number] => 105030 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/105030
Semiconductor device and method of manufacturing the same Jun 24, 1998 Issued
Array ( [id] => 1403430 [patent_doc_number] => 06541812 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-04-01 [patent_title] => 'Capacitor and method for forming the same' [patent_app_type] => B2 [patent_app_number] => 09/100300 [patent_app_country] => US [patent_app_date] => 1998-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 20 [patent_no_of_words] => 9195 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/541/06541812.pdf [firstpage_image] =>[orig_patent_app_number] => 09100300 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/100300
Capacitor and method for forming the same Jun 18, 1998 Issued
Array ( [id] => 7636093 [patent_doc_number] => 06380567 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-30 [patent_title] => 'Semiconductor device and fabrication method thereof' [patent_app_type] => B1 [patent_app_number] => 09/099327 [patent_app_country] => US [patent_app_date] => 1998-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 4657 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/380/06380567.pdf [firstpage_image] =>[orig_patent_app_number] => 09099327 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/099327
Semiconductor device and fabrication method thereof Jun 17, 1998 Issued
Array ( [id] => 4376481 [patent_doc_number] => 06288425 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-11 [patent_title] => 'SOI-MOSFET device' [patent_app_type] => 1 [patent_app_number] => 9/099107 [patent_app_country] => US [patent_app_date] => 1998-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 4639 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/288/06288425.pdf [firstpage_image] =>[orig_patent_app_number] => 099107 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/099107
SOI-MOSFET device Jun 17, 1998 Issued
Array ( [id] => 4086850 [patent_doc_number] => 06054744 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-25 [patent_title] => 'Metal silicide film stress control by grain boundary stuffing' [patent_app_type] => 1 [patent_app_number] => 9/098810 [patent_app_country] => US [patent_app_date] => 1998-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3471 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/054/06054744.pdf [firstpage_image] =>[orig_patent_app_number] => 098810 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/098810
Metal silicide film stress control by grain boundary stuffing Jun 16, 1998 Issued
Array ( [id] => 4387967 [patent_doc_number] => 06278151 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-21 [patent_title] => 'Semiconductor device having wiring detour around step' [patent_app_type] => 1 [patent_app_number] => 9/097667 [patent_app_country] => US [patent_app_date] => 1998-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 3252 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/278/06278151.pdf [firstpage_image] =>[orig_patent_app_number] => 097667 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/097667
Semiconductor device having wiring detour around step Jun 15, 1998 Issued
Array ( [id] => 6885859 [patent_doc_number] => 20010019128 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-09-06 [patent_title] => 'SEMICONDUCTOR DEVICE, DISPLAY DEVICE, AND METHOD FOR PRODUCING A SEMICONDUCTOR DEVICE' [patent_app_type] => new [patent_app_number] => 09/095587 [patent_app_country] => US [patent_app_date] => 1998-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6858 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0019/20010019128.pdf [firstpage_image] =>[orig_patent_app_number] => 09095587 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/095587
Semiconductor device, display device, and method for producing a semiconductor device Jun 10, 1998 Issued
Array ( [id] => 4385429 [patent_doc_number] => 06303958 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-16 [patent_title] => 'Semiconductor integrated circuit and method for manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 9/095890 [patent_app_country] => US [patent_app_date] => 1998-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 57 [patent_no_of_words] => 10469 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/303/06303958.pdf [firstpage_image] =>[orig_patent_app_number] => 095890 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/095890
Semiconductor integrated circuit and method for manufacturing the same Jun 10, 1998 Issued
Array ( [id] => 4372844 [patent_doc_number] => 06274884 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-14 [patent_title] => 'Thin film transistors for liquid crystal displays' [patent_app_type] => 1 [patent_app_number] => 9/092120 [patent_app_country] => US [patent_app_date] => 1998-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 24 [patent_no_of_words] => 4315 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/274/06274884.pdf [firstpage_image] =>[orig_patent_app_number] => 092120 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/092120
Thin film transistors for liquid crystal displays Jun 4, 1998 Issued
Array ( [id] => 4355131 [patent_doc_number] => 06215146 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-10 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => 1 [patent_app_number] => 9/090420 [patent_app_country] => US [patent_app_date] => 1998-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 47 [patent_no_of_words] => 7939 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/215/06215146.pdf [firstpage_image] =>[orig_patent_app_number] => 090420 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/090420
Semiconductor device and manufacturing method thereof Jun 3, 1998 Issued
Array ( [id] => 4264742 [patent_doc_number] => 06204533 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-20 [patent_title] => 'Vertical trench-gated power MOSFET having stripe geometry and high cell density' [patent_app_type] => 1 [patent_app_number] => 9/089250 [patent_app_country] => US [patent_app_date] => 1998-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 25 [patent_no_of_words] => 4616 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/204/06204533.pdf [firstpage_image] =>[orig_patent_app_number] => 089250 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/089250
Vertical trench-gated power MOSFET having stripe geometry and high cell density Jun 1, 1998 Issued
Array ( [id] => 1420408 [patent_doc_number] => 06512262 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-01-28 [patent_title] => 'Non-volatile semiconductor memory device and method of manufacturing the same' [patent_app_type] => B2 [patent_app_number] => 09/088460 [patent_app_country] => US [patent_app_date] => 1998-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 95 [patent_no_of_words] => 12843 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/512/06512262.pdf [firstpage_image] =>[orig_patent_app_number] => 09088460 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/088460
Non-volatile semiconductor memory device and method of manufacturing the same May 31, 1998 Issued
Array ( [id] => 4222705 [patent_doc_number] => 06087696 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-11 [patent_title] => 'Stacked tunneling dielectric technology for improving data retention of EEPROM cell' [patent_app_type] => 1 [patent_app_number] => 9/086437 [patent_app_country] => US [patent_app_date] => 1998-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 19 [patent_no_of_words] => 3870 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/087/06087696.pdf [firstpage_image] =>[orig_patent_app_number] => 086437 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/086437
Stacked tunneling dielectric technology for improving data retention of EEPROM cell May 27, 1998 Issued
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