Kriellion Antionette Sanders

Array ( [id] => 4038205 [patent_doc_number] => 05994758 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-30 [patent_title] => 'Semiconductor integrated circuit device having resistance element' [patent_app_type] => 1 [patent_app_number] => 8/993558 [patent_app_country] => US [patent_app_date] => 1997-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3574 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/994/05994758.pdf [firstpage_image] =>[orig_patent_app_number] => 993558 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4196466 [patent_doc_number] => 06130467 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-10 [patent_title] => 'Shallow trench isolation with spacers for improved gate oxide quality' [patent_app_type] => 1 [patent_app_number] => 8/993857 [patent_app_country] => US [patent_app_date] => 1997-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 3516 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/130/06130467.pdf [firstpage_image] =>[orig_patent_app_number] => 993857 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3960937 [patent_doc_number] => 05936275 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-10 [patent_title] => 'High density flash memory cell and method of forming a line of floating gate transistors' [patent_app_type] => 1 [patent_app_number] => 8/988852 [patent_app_country] => US [patent_app_date] => 1997-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2844 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/936/05936275.pdf [firstpage_image] =>[orig_patent_app_number] => 988852 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3947166 [patent_doc_number] => 05981987 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-09 [patent_title] => 'Power ground metallization routing in a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/984029 [patent_app_country] => US [patent_app_date] => 1997-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 2956 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/981/05981987.pdf [firstpage_image] =>[orig_patent_app_number] => 984029 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4145419 [patent_doc_number] => 06060763 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-09 [patent_title] => 'Semiconductor device and method for producing same' [patent_app_type] => 1 [patent_app_number] => 8/970189 [patent_app_country] => US [patent_app_date] => 1997-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 5493 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/060/06060763.pdf [firstpage_image] =>[orig_patent_app_number] => 970189 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4136708 [patent_doc_number] => 06034383 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-07 [patent_title] => 'High power density microwave HBT with uniform signal distribution' [patent_app_type] => 1 [patent_app_number] => 8/969269 [patent_app_country] => US [patent_app_date] => 1997-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 3998 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/034/06034383.pdf [firstpage_image] =>[orig_patent_app_number] => 969269 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3950268 [patent_doc_number] => 05990531 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-23 [patent_title] => 'Methods of making high voltage GaN-AlN based semiconductor devices and semiconductor devices made' [patent_app_type] => 1 [patent_app_number] => 8/968680 [patent_app_country] => US [patent_app_date] => 1997-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 2454 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/990/05990531.pdf [firstpage_image] =>[orig_patent_app_number] => 968680 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4366025 [patent_doc_number] => 06255685 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-03 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 8/968456 [patent_app_country] => US [patent_app_date] => 1997-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 51 [patent_figures_cnt] => 58 [patent_no_of_words] => 13233 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/255/06255685.pdf [firstpage_image] =>[orig_patent_app_number] => 968456 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4243836 [patent_doc_number] => 06081009 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-27 [patent_title] => 'High voltage mosfet structure' [patent_app_type] => 1 [patent_app_number] => 8/966867 [patent_app_country] => US [patent_app_date] => 1997-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2132 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/081/06081009.pdf [firstpage_image] =>[orig_patent_app_number] => 966867 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3820625 [patent_doc_number] => 05789787 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-04 [patent_title] => 'Asymmetrical N-channel and P-channel devices' [patent_app_type] => 1 [patent_app_number] => 8/963897 [patent_app_country] => US [patent_app_date] => 1997-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 21 [patent_no_of_words] => 6239 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/789/05789787.pdf [firstpage_image] =>[orig_patent_app_number] => 963897 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4176504 [patent_doc_number] => 06140673 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-31 [patent_title] => 'Semiconductor memory device and fabricating method' [patent_app_type] => 1 [patent_app_number] => 8/963193 [patent_app_country] => US [patent_app_date] => 1997-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 3593 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/140/06140673.pdf [firstpage_image] =>[orig_patent_app_number] => 963193 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3939970 [patent_doc_number] => 05929468 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-27 [patent_title] => 'Compound semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/959299 [patent_app_country] => US [patent_app_date] => 1997-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4312 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/929/05929468.pdf [firstpage_image] =>[orig_patent_app_number] => 959299 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3909375 [patent_doc_number] => 05898222 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-27 [patent_title] => 'Capped copper electrical interconnects' [patent_app_type] => 1 [patent_app_number] => 8/950262 [patent_app_country] => US [patent_app_date] => 1997-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 3473 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/898/05898222.pdf [firstpage_image] =>[orig_patent_app_number] => 950262 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4027040 [patent_doc_number] => 05925914 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-20 [patent_title] => 'Asymmetric S/D structure to improve transistor performance by reducing Miller capacitance' [patent_app_type] => 1 [patent_app_number] => 8/944349 [patent_app_country] => US [patent_app_date] => 1997-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 4181 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/925/05925914.pdf [firstpage_image] =>[orig_patent_app_number] => 944349 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3812461 [patent_doc_number] => 05831317 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-03 [patent_title] => 'Semiconductor device and manufacture thereof' [patent_app_type] => 1 [patent_app_number] => 8/941218 [patent_app_country] => US [patent_app_date] => 1997-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 21 [patent_no_of_words] => 7066 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/831/05831317.pdf [firstpage_image] =>[orig_patent_app_number] => 941218 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4020040 [patent_doc_number] => 05880514 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-09 [patent_title] => 'Protection circuit for semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/941069 [patent_app_country] => US [patent_app_date] => 1997-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4736 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/880/05880514.pdf [firstpage_image] =>[orig_patent_app_number] => 941069 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4119931 [patent_doc_number] => 06046482 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-04 [patent_title] => 'Cell structure for mask ROM' [patent_app_type] => 1 [patent_app_number] => 8/935072 [patent_app_country] => US [patent_app_date] => 1997-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 2391 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/046/06046482.pdf [firstpage_image] =>[orig_patent_app_number] => 935072 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3987427 [patent_doc_number] => 05861643 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-19 [patent_title] => 'Self-aligned JFET' [patent_app_type] => 1 [patent_app_number] => 8/933961 [patent_app_country] => US [patent_app_date] => 1997-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2980 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 304 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/861/05861643.pdf [firstpage_image] =>[orig_patent_app_number] => 933961 [rel_patent_id] =>[rel_patent_doc_number] =>)