Search

Kriellion Antionette Sanders

Examiner (ID: 8649)

Most Active Art Unit
1714
Art Unit(s)
1761, 1768, 1503, 1511, 1714, 1796, 1509
Total Applications
2736
Issued Applications
2061
Pending Applications
79
Abandoned Applications
597

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3892414 [patent_doc_number] => 05777363 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-07 [patent_title] => 'Semiconductor device with composite drift region' [patent_app_type] => 1 [patent_app_number] => 8/819495 [patent_app_country] => US [patent_app_date] => 1997-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 1977 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/777/05777363.pdf [firstpage_image] =>[orig_patent_app_number] => 819495 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/819495
Semiconductor device with composite drift region Mar 16, 1997 Issued
Array ( [id] => 3802163 [patent_doc_number] => 05828122 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-27 [patent_title] => 'Semiconductor body with a substrate glued to a support body' [patent_app_type] => 1 [patent_app_number] => 8/815253 [patent_app_country] => US [patent_app_date] => 1997-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 2991 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/828/05828122.pdf [firstpage_image] =>[orig_patent_app_number] => 815253 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/815253
Semiconductor body with a substrate glued to a support body Mar 11, 1997 Issued
Array ( [id] => 3864889 [patent_doc_number] => 05793093 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-11 [patent_title] => 'Substrate isolation for analog/digital IC chips' [patent_app_type] => 1 [patent_app_number] => 8/814817 [patent_app_country] => US [patent_app_date] => 1997-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 2831 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/793/05793093.pdf [firstpage_image] =>[orig_patent_app_number] => 814817 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/814817
Substrate isolation for analog/digital IC chips Mar 10, 1997 Issued
Array ( [id] => 3831002 [patent_doc_number] => 05783851 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-21 [patent_title] => 'Semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/796689 [patent_app_country] => US [patent_app_date] => 1997-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 21 [patent_no_of_words] => 10581 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/783/05783851.pdf [firstpage_image] =>[orig_patent_app_number] => 796689 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/796689
Semiconductor device Mar 3, 1997 Issued
Array ( [id] => 3794359 [patent_doc_number] => 05841161 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-24 [patent_title] => 'Flash memory and method for fabricating the same' [patent_app_type] => 1 [patent_app_number] => 8/807979 [patent_app_country] => US [patent_app_date] => 1997-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 15 [patent_no_of_words] => 2036 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/841/05841161.pdf [firstpage_image] =>[orig_patent_app_number] => 807979 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/807979
Flash memory and method for fabricating the same Mar 2, 1997 Issued
Array ( [id] => 4243888 [patent_doc_number] => 06166413 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-26 [patent_title] => 'Semiconductor device having field effect transistors different in thickness of gate electrodes and process of fabrication thereof' [patent_app_type] => 1 [patent_app_number] => 8/808422 [patent_app_country] => US [patent_app_date] => 1997-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 5202 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/166/06166413.pdf [firstpage_image] =>[orig_patent_app_number] => 808422 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/808422
Semiconductor device having field effect transistors different in thickness of gate electrodes and process of fabrication thereof Feb 27, 1997 Issued
Array ( [id] => 1476408 [patent_doc_number] => 06388323 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-14 [patent_title] => 'Electrode material and electrode for III-V group compound semiconductor' [patent_app_type] => B1 [patent_app_number] => 08/808537 [patent_app_country] => US [patent_app_date] => 1997-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 2752 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/388/06388323.pdf [firstpage_image] =>[orig_patent_app_number] => 08808537 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/808537
Electrode material and electrode for III-V group compound semiconductor Feb 27, 1997 Issued
Array ( [id] => 4075756 [patent_doc_number] => 06069375 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-30 [patent_title] => 'Field effect transistor' [patent_app_type] => 1 [patent_app_number] => 8/807325 [patent_app_country] => US [patent_app_date] => 1997-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 34 [patent_no_of_words] => 8346 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/069/06069375.pdf [firstpage_image] =>[orig_patent_app_number] => 807325 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/807325
Field effect transistor Feb 26, 1997 Issued
Array ( [id] => 4019837 [patent_doc_number] => 05880501 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-09 [patent_title] => 'Semiconductor integrated circuit and manufacturing method of the same' [patent_app_type] => 1 [patent_app_number] => 8/805463 [patent_app_country] => US [patent_app_date] => 1997-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 2140 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/880/05880501.pdf [firstpage_image] =>[orig_patent_app_number] => 805463 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/805463
Semiconductor integrated circuit and manufacturing method of the same Feb 25, 1997 Issued
Array ( [id] => 3834720 [patent_doc_number] => 05760461 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-02 [patent_title] => 'Vertical mask for defining a region on a wall of a semiconductor structure' [patent_app_type] => 1 [patent_app_number] => 8/804305 [patent_app_country] => US [patent_app_date] => 1997-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 14 [patent_no_of_words] => 2818 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/760/05760461.pdf [firstpage_image] =>[orig_patent_app_number] => 804305 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/804305
Vertical mask for defining a region on a wall of a semiconductor structure Feb 23, 1997 Issued
Array ( [id] => 3812133 [patent_doc_number] => 05854505 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-29 [patent_title] => 'Process for forming silicon oxide film and gate oxide film for MOS transistors' [patent_app_type] => 1 [patent_app_number] => 8/804957 [patent_app_country] => US [patent_app_date] => 1997-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 4281 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/854/05854505.pdf [firstpage_image] =>[orig_patent_app_number] => 804957 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/804957
Process for forming silicon oxide film and gate oxide film for MOS transistors Feb 23, 1997 Issued
Array ( [id] => 3802132 [patent_doc_number] => 05828120 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-27 [patent_title] => 'Semiconductor device and production method thereof' [patent_app_type] => 1 [patent_app_number] => 8/804413 [patent_app_country] => US [patent_app_date] => 1997-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 51 [patent_figures_cnt] => 125 [patent_no_of_words] => 17296 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/828/05828120.pdf [firstpage_image] =>[orig_patent_app_number] => 804413 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/804413
Semiconductor device and production method thereof Feb 20, 1997 Issued
Array ( [id] => 3748210 [patent_doc_number] => 05801431 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-01 [patent_title] => 'MOS gated semiconductor device with source metal covering the active gate' [patent_app_type] => 1 [patent_app_number] => 8/803071 [patent_app_country] => US [patent_app_date] => 1997-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3436 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 27 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/801/05801431.pdf [firstpage_image] =>[orig_patent_app_number] => 803071 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/803071
MOS gated semiconductor device with source metal covering the active gate Feb 19, 1997 Issued
Array ( [id] => 3745358 [patent_doc_number] => 05753957 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-19 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 8/803112 [patent_app_country] => US [patent_app_date] => 1997-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 70 [patent_figures_cnt] => 118 [patent_no_of_words] => 15321 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/753/05753957.pdf [firstpage_image] =>[orig_patent_app_number] => 803112 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/803112
Semiconductor device and method of manufacturing the same Feb 19, 1997 Issued
Array ( [id] => 3891464 [patent_doc_number] => 05714777 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-03 [patent_title] => 'Si/SiGe vertical junction field effect transistor' [patent_app_type] => 1 [patent_app_number] => 8/803033 [patent_app_country] => US [patent_app_date] => 1997-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 2708 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/714/05714777.pdf [firstpage_image] =>[orig_patent_app_number] => 803033 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/803033
Si/SiGe vertical junction field effect transistor Feb 18, 1997 Issued
Array ( [id] => 4062257 [patent_doc_number] => 05864168 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-26 [patent_title] => 'Apparatus and method for reduced substrate noise coupling' [patent_app_type] => 1 [patent_app_number] => 8/802801 [patent_app_country] => US [patent_app_date] => 1997-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1193 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/864/05864168.pdf [firstpage_image] =>[orig_patent_app_number] => 802801 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/802801
Apparatus and method for reduced substrate noise coupling Feb 17, 1997 Issued
Array ( [id] => 3776066 [patent_doc_number] => 05850101 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-15 [patent_title] => 'Bipolar transistor with extended emitter' [patent_app_type] => 1 [patent_app_number] => 8/799670 [patent_app_country] => US [patent_app_date] => 1997-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3904 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/850/05850101.pdf [firstpage_image] =>[orig_patent_app_number] => 799670 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/799670
Bipolar transistor with extended emitter Feb 10, 1997 Issued
Array ( [id] => 3799541 [patent_doc_number] => 05780906 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-14 [patent_title] => 'Static memory cell and method of manufacturing a static memory cell' [patent_app_type] => 1 [patent_app_number] => 8/796777 [patent_app_country] => US [patent_app_date] => 1997-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 6001 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/780/05780906.pdf [firstpage_image] =>[orig_patent_app_number] => 796777 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/796777
Static memory cell and method of manufacturing a static memory cell Feb 9, 1997 Issued
Array ( [id] => 3950090 [patent_doc_number] => 05990520 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-23 [patent_title] => 'Method for fabricating a high performance vertical bipolar NPN or PNP transistor having low base resistance in a standard CMOS process' [patent_app_type] => 1 [patent_app_number] => 8/795159 [patent_app_country] => US [patent_app_date] => 1997-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 5064 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/990/05990520.pdf [firstpage_image] =>[orig_patent_app_number] => 795159 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/795159
Method for fabricating a high performance vertical bipolar NPN or PNP transistor having low base resistance in a standard CMOS process Feb 6, 1997 Issued
08/795155 USE OF EXTENSION REGIONS TO IMPROVE BREAKDOWN VOLTAGE OF A LOW - VOLTAGE LATERAL DMOS DEVICE Feb 6, 1997 Abandoned
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