
Kurt A. Mueller
Examiner (ID: 9161, Phone: (571)270-3889 , Office: P/2157 )
| Most Active Art Unit | 2157 |
| Art Unit(s) | 2157, 2164 |
| Total Applications | 340 |
| Issued Applications | 200 |
| Pending Applications | 2 |
| Abandoned Applications | 142 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5039731
[patent_doc_number] => 20070092013
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-04-26
[patent_title] => 'APPARATUS AND METHOD FOR TRACKING SYMBOL TIMING OF OFDM MODULATION IN A MULTI-PATH CHANNEL'
[patent_app_type] => utility
[patent_app_number] => 11/470560
[patent_app_country] => US
[patent_app_date] => 2006-09-06
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[pdf_file] => publications/A1/0092/20070092013.pdf
[firstpage_image] =>[orig_patent_app_number] => 11470560
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/470560 | Apparatus and method for tracking symbol timing of OFDM modulation in a multi-path channel | Sep 5, 2006 | Issued |
Array
(
[id] => 135907
[patent_doc_number] => 07697646
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[patent_issue_date] => 2010-04-13
[patent_title] => 'Discrete state-space filter and method for processing asynchronously sampled data'
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Array
(
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[patent_issue_date] => 2010-05-25
[patent_title] => 'Fast RMS measurement of input I/Q signals in a W-CDMA system'
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Array
(
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[patent_title] => 'DECISION FEEDBACK RESTORE'
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[patent_app_number] => 11/469937
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Array
(
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[patent_title] => 'Systems, methods and computer program products for high speed data transfer using a plurality of external clock signals'
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[patent_app_number] => 11/470033
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/470033 | Systems, methods and computer program products for high speed data transfer using a plurality of external clock signals | Sep 4, 2006 | Issued |
Array
(
[id] => 5055831
[patent_doc_number] => 20070058753
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[patent_issue_date] => 2007-03-15
[patent_title] => 'BPSK demodulator circuit using an anti-parallel synchronization loop'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/512406 | BPSK demodulator circuit using an anti-parallel synchronization loop | Aug 29, 2006 | Abandoned |
Array
(
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[patent_title] => 'Data transmission in communication system'
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[firstpage_image] =>[orig_patent_app_number] => 11512257
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/512257 | Data transmission in communication system by disabling radiation patterns | Aug 29, 2006 | Issued |
Array
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[id] => 5147618
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[patent_title] => 'Apparatus and method for compensating for I/Q mismatch in TDD system'
[patent_app_type] => utility
[patent_app_number] => 11/511957
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/511957 | Apparatus and method for compensating for I/Q mismatch in TDD system | Aug 28, 2006 | Issued |
Array
(
[id] => 5004021
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[patent_title] => 'Receiver and receiving method'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/511330 | Receiver and receiving method for determining an output signal having minimum error among output signals | Aug 28, 2006 | Issued |
Array
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[patent_title] => 'Apparatus and method for feeding back channel quality information and scheduling apparatus and method using the same in a wireless communication system'
[patent_app_type] => utility
[patent_app_number] => 11/511504
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Array
(
[id] => 4732884
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[patent_title] => 'Apparatus, method and computer program product providing soft decision generation with lattice reduction aided MIMO detection'
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/508644 | Signal processing system in wireless mobile communication system | Aug 22, 2006 | Issued |
Array
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[patent_title] => 'Clock and data recovery circuit having wide phase margin'
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Array
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Array
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[patent_title] => 'SYSTEM AND METHOD TO DETERMINE POWER CUTBACK IN COMMUNICATION SYSTEMS'
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Array
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