Search

Kurt C Rowan

Examiner (ID: 13691)

Most Active Art Unit
3205
Art Unit(s)
3643, 3616, 2899, 3205, 2761
Total Applications
2630
Issued Applications
1958
Pending Applications
87
Abandoned Applications
584

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 102145 [patent_doc_number] => 07723015 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-25 [patent_title] => 'Method for manufacturing an array of interferometeric modulators' [patent_app_type] => utility [patent_app_number] => 11/832471 [patent_app_country] => US [patent_app_date] => 2007-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 3509 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/723/07723015.pdf [firstpage_image] =>[orig_patent_app_number] => 11832471 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/832471
Method for manufacturing an array of interferometeric modulators Jul 31, 2007 Issued
Array ( [id] => 4943971 [patent_doc_number] => 20080081296 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-03 [patent_title] => 'METHOD FOR FABRICATING RECESS PATTERN IN SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 11/771143 [patent_app_country] => US [patent_app_date] => 2007-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 2201 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0081/20080081296.pdf [firstpage_image] =>[orig_patent_app_number] => 11771143 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/771143
Method for fabricating recess pattern in semiconductor device Jun 28, 2007 Issued
Array ( [id] => 4555836 [patent_doc_number] => 07838206 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-23 [patent_title] => 'Substrate processing method and substrate processing apparatus' [patent_app_type] => utility [patent_app_number] => 11/758389 [patent_app_country] => US [patent_app_date] => 2007-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 4239 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/838/07838206.pdf [firstpage_image] =>[orig_patent_app_number] => 11758389 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/758389
Substrate processing method and substrate processing apparatus Jun 4, 2007 Issued
Array ( [id] => 23187 [patent_doc_number] => 07794920 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-14 [patent_title] => 'Pattern decomposition method for double exposure' [patent_app_type] => utility [patent_app_number] => 11/754811 [patent_app_country] => US [patent_app_date] => 2007-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2099 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/794/07794920.pdf [firstpage_image] =>[orig_patent_app_number] => 11754811 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/754811
Pattern decomposition method for double exposure May 28, 2007 Issued
Array ( [id] => 4792017 [patent_doc_number] => 20080292991 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-27 [patent_title] => 'HIGH FIDELITY MULTIPLE RESIST PATTERNING' [patent_app_type] => utility [patent_app_number] => 11/753443 [patent_app_country] => US [patent_app_date] => 2007-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4668 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0292/20080292991.pdf [firstpage_image] =>[orig_patent_app_number] => 11753443 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/753443
HIGH FIDELITY MULTIPLE RESIST PATTERNING May 23, 2007 Abandoned
Array ( [id] => 9454908 [patent_doc_number] => 08715912 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-06 [patent_title] => 'Method for producing a high resolution resist pattern on a semiconductor wafer' [patent_app_type] => utility [patent_app_number] => 11/805139 [patent_app_country] => US [patent_app_date] => 2007-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 4537 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11805139 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/805139
Method for producing a high resolution resist pattern on a semiconductor wafer May 20, 2007 Issued
Array ( [id] => 5004875 [patent_doc_number] => 20070202445 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-30 [patent_title] => 'Method for manufacturing micro structure' [patent_app_type] => utility [patent_app_number] => 11/790943 [patent_app_country] => US [patent_app_date] => 2007-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7036 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0202/20070202445.pdf [firstpage_image] =>[orig_patent_app_number] => 11790943 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/790943
Method for manufacturing micro structure Apr 29, 2007 Issued
Array ( [id] => 4682203 [patent_doc_number] => 20080248429 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-09 [patent_title] => 'METHOD OF FORMING A CONTACT HOLE' [patent_app_type] => utility [patent_app_number] => 11/696194 [patent_app_country] => US [patent_app_date] => 2007-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 3455 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0248/20080248429.pdf [firstpage_image] =>[orig_patent_app_number] => 11696194 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/696194
Method of forming a contact hole Apr 3, 2007 Issued
Array ( [id] => 5165516 [patent_doc_number] => 20070287102 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-13 [patent_title] => 'Pattern formation method' [patent_app_type] => utility [patent_app_number] => 11/723056 [patent_app_country] => US [patent_app_date] => 2007-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5527 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0287/20070287102.pdf [firstpage_image] =>[orig_patent_app_number] => 11723056 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/723056
Pattern formation method Mar 15, 2007 Issued
Array ( [id] => 5085260 [patent_doc_number] => 20070275311 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-29 [patent_title] => 'FLAT PANEL DISPLAY MANUFACTURING' [patent_app_type] => utility [patent_app_number] => 11/681325 [patent_app_country] => US [patent_app_date] => 2007-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5510 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0275/20070275311.pdf [firstpage_image] =>[orig_patent_app_number] => 11681325 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/681325
Flat panel display manufacturing Mar 1, 2007 Issued
Array ( [id] => 4727137 [patent_doc_number] => 20080206679 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-28 [patent_title] => 'Contrast Enhancing Exposure System and Method For Use In Semiconductor Fabrication' [patent_app_type] => utility [patent_app_number] => 11/677879 [patent_app_country] => US [patent_app_date] => 2007-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1828 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0206/20080206679.pdf [firstpage_image] =>[orig_patent_app_number] => 11677879 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/677879
Contrast enhancing exposure system and method for use in semiconductor fabrication Feb 21, 2007 Issued
Array ( [id] => 4733700 [patent_doc_number] => 20080050679 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-28 [patent_title] => 'METHODS AND SYSTEMS FOR PERFORMING IMMERSION PROCESSING DURING LITHOGRAPHY' [patent_app_type] => utility [patent_app_number] => 11/678034 [patent_app_country] => US [patent_app_date] => 2007-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7703 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0050/20080050679.pdf [firstpage_image] =>[orig_patent_app_number] => 11678034 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/678034
METHODS AND SYSTEMS FOR PERFORMING IMMERSION PROCESSING DURING LITHOGRAPHY Feb 21, 2007 Abandoned
Array ( [id] => 5236400 [patent_doc_number] => 20070128557 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-07 [patent_title] => 'PHOTOTOOL COATING' [patent_app_type] => utility [patent_app_number] => 11/671366 [patent_app_country] => US [patent_app_date] => 2007-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6599 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20070128557.pdf [firstpage_image] =>[orig_patent_app_number] => 11671366 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/671366
PHOTOTOOL COATING Feb 4, 2007 Abandoned
Array ( [id] => 5062907 [patent_doc_number] => 20070224546 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-27 [patent_title] => 'Method of forming resist pattern and method of maufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/700131 [patent_app_country] => US [patent_app_date] => 2007-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6789 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0224/20070224546.pdf [firstpage_image] =>[orig_patent_app_number] => 11700131 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/700131
Method of forming resist pattern and method of manufacturing semiconductor device Jan 30, 2007 Issued
Array ( [id] => 8591665 [patent_doc_number] => 08349540 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-08 [patent_title] => 'Semiconductor device manufacturing method' [patent_app_type] => utility [patent_app_number] => 11/698062 [patent_app_country] => US [patent_app_date] => 2007-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 75 [patent_no_of_words] => 24867 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11698062 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/698062
Semiconductor device manufacturing method Jan 25, 2007 Issued
Array ( [id] => 23190 [patent_doc_number] => 07794923 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-14 [patent_title] => 'Substrate processing method, substrate processing apparatus, and manufacturing method of semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/654565 [patent_app_country] => US [patent_app_date] => 2007-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 9933 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/794/07794923.pdf [firstpage_image] =>[orig_patent_app_number] => 11654565 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/654565
Substrate processing method, substrate processing apparatus, and manufacturing method of semiconductor device Jan 17, 2007 Issued
Array ( [id] => 5236401 [patent_doc_number] => 20070128558 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-07 [patent_title] => 'Pattern formation method and exposure system' [patent_app_type] => utility [patent_app_number] => 11/653331 [patent_app_country] => US [patent_app_date] => 2007-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4438 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20070128558.pdf [firstpage_image] =>[orig_patent_app_number] => 11653331 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/653331
Pattern formation method and exposure system Jan 15, 2007 Abandoned
Array ( [id] => 23188 [patent_doc_number] => 07794921 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-14 [patent_title] => 'Imaging post structures using x and y dipole optics and a single mask' [patent_app_type] => utility [patent_app_number] => 11/618776 [patent_app_country] => US [patent_app_date] => 2006-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 24 [patent_no_of_words] => 5802 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/794/07794921.pdf [firstpage_image] =>[orig_patent_app_number] => 11618776 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/618776
Imaging post structures using x and y dipole optics and a single mask Dec 29, 2006 Issued
Array ( [id] => 5045920 [patent_doc_number] => 20070264593 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-15 [patent_title] => 'Method for manufacturing semiconductor device using immersion lithography process' [patent_app_type] => utility [patent_app_number] => 11/647323 [patent_app_country] => US [patent_app_date] => 2006-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2537 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0264/20070264593.pdf [firstpage_image] =>[orig_patent_app_number] => 11647323 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/647323
Method for manufacturing semiconductor device using immersion lithography process Dec 28, 2006 Issued
Array ( [id] => 4657466 [patent_doc_number] => 20080026327 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-31 [patent_title] => 'Method for forming fine pattern with a double exposure technology' [patent_app_type] => utility [patent_app_number] => 11/647325 [patent_app_country] => US [patent_app_date] => 2006-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 2582 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20080026327.pdf [firstpage_image] =>[orig_patent_app_number] => 11647325 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/647325
Method for forming fine pattern with a double exposure technology Dec 28, 2006 Issued
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