Kurt C Rowan
Examiner (ID: 13691)
Most Active Art Unit | 3205 |
Art Unit(s) | 3643, 3616, 2899, 3205, 2761 |
Total Applications | 2630 |
Issued Applications | 1958 |
Pending Applications | 87 |
Abandoned Applications | 584 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 102145
[patent_doc_number] => 07723015
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-05-25
[patent_title] => 'Method for manufacturing an array of interferometeric modulators'
[patent_app_type] => utility
[patent_app_number] => 11/832471
[patent_app_country] => US
[patent_app_date] => 2007-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 3509
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/723/07723015.pdf
[firstpage_image] =>[orig_patent_app_number] => 11832471
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/832471 | Method for manufacturing an array of interferometeric modulators | Jul 31, 2007 | Issued |
Array
(
[id] => 4943971
[patent_doc_number] => 20080081296
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-04-03
[patent_title] => 'METHOD FOR FABRICATING RECESS PATTERN IN SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 11/771143
[patent_app_country] => US
[patent_app_date] => 2007-06-29
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0081/20080081296.pdf
[firstpage_image] =>[orig_patent_app_number] => 11771143
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/771143 | Method for fabricating recess pattern in semiconductor device | Jun 28, 2007 | Issued |
Array
(
[id] => 4555836
[patent_doc_number] => 07838206
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-11-23
[patent_title] => 'Substrate processing method and substrate processing apparatus'
[patent_app_type] => utility
[patent_app_number] => 11/758389
[patent_app_country] => US
[patent_app_date] => 2007-06-05
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Array
(
[id] => 23187
[patent_doc_number] => 07794920
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-09-14
[patent_title] => 'Pattern decomposition method for double exposure'
[patent_app_type] => utility
[patent_app_number] => 11/754811
[patent_app_country] => US
[patent_app_date] => 2007-05-29
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/754811 | Pattern decomposition method for double exposure | May 28, 2007 | Issued |
Array
(
[id] => 4792017
[patent_doc_number] => 20080292991
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-11-27
[patent_title] => 'HIGH FIDELITY MULTIPLE RESIST PATTERNING'
[patent_app_type] => utility
[patent_app_number] => 11/753443
[patent_app_country] => US
[patent_app_date] => 2007-05-24
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[firstpage_image] =>[orig_patent_app_number] => 11753443
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/753443 | HIGH FIDELITY MULTIPLE RESIST PATTERNING | May 23, 2007 | Abandoned |
Array
(
[id] => 9454908
[patent_doc_number] => 08715912
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-05-06
[patent_title] => 'Method for producing a high resolution resist pattern on a semiconductor wafer'
[patent_app_type] => utility
[patent_app_number] => 11/805139
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Array
(
[id] => 5004875
[patent_doc_number] => 20070202445
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-08-30
[patent_title] => 'Method for manufacturing micro structure'
[patent_app_type] => utility
[patent_app_number] => 11/790943
[patent_app_country] => US
[patent_app_date] => 2007-04-30
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0202/20070202445.pdf
[firstpage_image] =>[orig_patent_app_number] => 11790943
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/790943 | Method for manufacturing micro structure | Apr 29, 2007 | Issued |
Array
(
[id] => 4682203
[patent_doc_number] => 20080248429
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-10-09
[patent_title] => 'METHOD OF FORMING A CONTACT HOLE'
[patent_app_type] => utility
[patent_app_number] => 11/696194
[patent_app_country] => US
[patent_app_date] => 2007-04-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
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[patent_no_of_words] => 3455
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0248/20080248429.pdf
[firstpage_image] =>[orig_patent_app_number] => 11696194
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/696194 | Method of forming a contact hole | Apr 3, 2007 | Issued |
Array
(
[id] => 5165516
[patent_doc_number] => 20070287102
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-12-13
[patent_title] => 'Pattern formation method'
[patent_app_type] => utility
[patent_app_number] => 11/723056
[patent_app_country] => US
[patent_app_date] => 2007-03-16
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[firstpage_image] =>[orig_patent_app_number] => 11723056
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/723056 | Pattern formation method | Mar 15, 2007 | Issued |
Array
(
[id] => 5085260
[patent_doc_number] => 20070275311
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-11-29
[patent_title] => 'FLAT PANEL DISPLAY MANUFACTURING'
[patent_app_type] => utility
[patent_app_number] => 11/681325
[patent_app_country] => US
[patent_app_date] => 2007-03-02
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0275/20070275311.pdf
[firstpage_image] =>[orig_patent_app_number] => 11681325
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/681325 | Flat panel display manufacturing | Mar 1, 2007 | Issued |
Array
(
[id] => 4727137
[patent_doc_number] => 20080206679
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-08-28
[patent_title] => 'Contrast Enhancing Exposure System and Method For Use In Semiconductor Fabrication'
[patent_app_type] => utility
[patent_app_number] => 11/677879
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[patent_app_date] => 2007-02-22
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[pdf_file] => publications/A1/0206/20080206679.pdf
[firstpage_image] =>[orig_patent_app_number] => 11677879
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/677879 | Contrast enhancing exposure system and method for use in semiconductor fabrication | Feb 21, 2007 | Issued |
Array
(
[id] => 4733700
[patent_doc_number] => 20080050679
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-02-28
[patent_title] => 'METHODS AND SYSTEMS FOR PERFORMING IMMERSION PROCESSING DURING LITHOGRAPHY'
[patent_app_type] => utility
[patent_app_number] => 11/678034
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/678034 | METHODS AND SYSTEMS FOR PERFORMING IMMERSION PROCESSING DURING LITHOGRAPHY | Feb 21, 2007 | Abandoned |
Array
(
[id] => 5236400
[patent_doc_number] => 20070128557
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Array
(
[id] => 5062907
[patent_doc_number] => 20070224546
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[patent_title] => 'Method of forming resist pattern and method of maufacturing semiconductor device'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/700131 | Method of forming resist pattern and method of manufacturing semiconductor device | Jan 30, 2007 | Issued |
Array
(
[id] => 8591665
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Array
(
[id] => 23190
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Array
(
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/618776 | Imaging post structures using x and y dipole optics and a single mask | Dec 29, 2006 | Issued |
Array
(
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/647325 | Method for forming fine pattern with a double exposure technology | Dec 28, 2006 | Issued |