Search

Kurt C Rowan

Examiner (ID: 13691)

Most Active Art Unit
3205
Art Unit(s)
3643, 3616, 2899, 3205, 2761
Total Applications
2630
Issued Applications
1958
Pending Applications
87
Abandoned Applications
584

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 944015 [patent_doc_number] => 06967068 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-11-22 [patent_title] => 'Method of controlling stepper process parameters based upon optical properties of incoming anti-reflecting coating layers, and system for accomplishing same' [patent_app_type] => utility [patent_app_number] => 10/046422 [patent_app_country] => US [patent_app_date] => 2001-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 5491 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/967/06967068.pdf [firstpage_image] =>[orig_patent_app_number] => 10046422 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/046422
Method of controlling stepper process parameters based upon optical properties of incoming anti-reflecting coating layers, and system for accomplishing same Nov 6, 2001 Issued
Array ( [id] => 6791851 [patent_doc_number] => 20030087195 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-08 [patent_title] => 'Method of patterning electrically conductive polymers' [patent_app_type] => new [patent_app_number] => 09/983692 [patent_app_country] => US [patent_app_date] => 2001-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3772 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0087/20030087195.pdf [firstpage_image] =>[orig_patent_app_number] => 09983692 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/983692
Method of patterning electrically conductive polymers Oct 24, 2001 Issued
Array ( [id] => 6241953 [patent_doc_number] => 20020045135 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-04-18 [patent_title] => 'Method for manufacturing circuit board having conductive via' [patent_app_type] => new [patent_app_number] => 09/978124 [patent_app_country] => US [patent_app_date] => 2001-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2620 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0045/20020045135.pdf [firstpage_image] =>[orig_patent_app_number] => 09978124 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/978124
Method for manufacturing circuit board having conductive via Oct 14, 2001 Issued
09/807262 Application of textured or patterned surfaces to a prototype Oct 10, 2001 Abandoned
Array ( [id] => 6813491 [patent_doc_number] => 20030073041 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-17 [patent_title] => 'Partial photoresist etching' [patent_app_type] => new [patent_app_number] => 09/975854 [patent_app_country] => US [patent_app_date] => 2001-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2651 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0073/20030073041.pdf [firstpage_image] =>[orig_patent_app_number] => 09975854 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/975854
Partial photoresist etching Oct 10, 2001 Issued
Array ( [id] => 6782878 [patent_doc_number] => 20030064325 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-03 [patent_title] => 'Method of manufacturing printed circuit board having wiring layers electrically connected via solid cylindrical copper interconnecting bodies' [patent_app_type] => new [patent_app_number] => 09/969043 [patent_app_country] => US [patent_app_date] => 2001-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1578 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0064/20030064325.pdf [firstpage_image] =>[orig_patent_app_number] => 09969043 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/969043
Method of manufacturing printed circuit board having wiring layers electrically connected via solid cylindrical copper interconnecting bodies Oct 2, 2001 Abandoned
Array ( [id] => 7089185 [patent_doc_number] => 20050009298 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-13 [patent_title] => 'Method for manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/485734 [patent_app_country] => US [patent_app_date] => 2001-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 7754 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0009/20050009298.pdf [firstpage_image] =>[orig_patent_app_number] => 10485734 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/485734
Method for manufacturing semiconductor device Sep 19, 2001 Abandoned
Array ( [id] => 1283943 [patent_doc_number] => 06638664 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-10-28 [patent_title] => 'Optical mask correction method' [patent_app_type] => B2 [patent_app_number] => 09/954933 [patent_app_country] => US [patent_app_date] => 2001-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 1822 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/638/06638664.pdf [firstpage_image] =>[orig_patent_app_number] => 09954933 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/954933
Optical mask correction method Sep 17, 2001 Issued
Array ( [id] => 1298904 [patent_doc_number] => 06623911 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-23 [patent_title] => 'Method to form code marks on mask ROM products' [patent_app_type] => B1 [patent_app_number] => 09/953524 [patent_app_country] => US [patent_app_date] => 2001-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 1680 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/623/06623911.pdf [firstpage_image] =>[orig_patent_app_number] => 09953524 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/953524
Method to form code marks on mask ROM products Sep 16, 2001 Issued
Array ( [id] => 6856036 [patent_doc_number] => 20030129537 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-10 [patent_title] => 'Method of treating photoresists using electrodeless UV lamps' [patent_app_type] => new [patent_app_number] => 09/951582 [patent_app_country] => US [patent_app_date] => 2001-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 7803 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0129/20030129537.pdf [firstpage_image] =>[orig_patent_app_number] => 09951582 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/951582
Method of treating photoresists using electrodeless UV lamps Sep 11, 2001 Issued
Array ( [id] => 1602441 [patent_doc_number] => 06432619 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-13 [patent_title] => 'Method for reducing photolithographic steps in a semiconductor interconnect process' [patent_app_type] => B1 [patent_app_number] => 09/943995 [patent_app_country] => US [patent_app_date] => 2001-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3757 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/432/06432619.pdf [firstpage_image] =>[orig_patent_app_number] => 09943995 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/943995
Method for reducing photolithographic steps in a semiconductor interconnect process Aug 29, 2001 Issued
Array ( [id] => 448247 [patent_doc_number] => 07250247 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-31 [patent_title] => 'Photolithographic structures using multiple anti-reflecting coatings' [patent_app_type] => utility [patent_app_number] => 09/941760 [patent_app_country] => US [patent_app_date] => 2001-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 5804 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/250/07250247.pdf [firstpage_image] =>[orig_patent_app_number] => 09941760 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/941760
Photolithographic structures using multiple anti-reflecting coatings Aug 29, 2001 Issued
Array ( [id] => 1253004 [patent_doc_number] => 06670109 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-12-30 [patent_title] => 'Photolithographic methods of using a single reticle to form overlapping patterns' [patent_app_type] => B2 [patent_app_number] => 09/943186 [patent_app_country] => US [patent_app_date] => 2001-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 4533 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/670/06670109.pdf [firstpage_image] =>[orig_patent_app_number] => 09943186 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/943186
Photolithographic methods of using a single reticle to form overlapping patterns Aug 28, 2001 Issued
Array ( [id] => 6688236 [patent_doc_number] => 20030031961 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-13 [patent_title] => 'Dual-focused ion beams for semiconductor image scanning and mask repair' [patent_app_type] => new [patent_app_number] => 09/927929 [patent_app_country] => US [patent_app_date] => 2001-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2806 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0031/20030031961.pdf [firstpage_image] =>[orig_patent_app_number] => 09927929 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/927929
Dual-focused ion beams for semiconductor image scanning and mask repair Aug 9, 2001 Issued
Array ( [id] => 1269473 [patent_doc_number] => 06653056 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-11-25 [patent_title] => 'Process for patterning non-photoimagable ceramic tape' [patent_app_type] => B2 [patent_app_number] => 09/901246 [patent_app_country] => US [patent_app_date] => 2001-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 10 [patent_no_of_words] => 4187 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 17 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/653/06653056.pdf [firstpage_image] =>[orig_patent_app_number] => 09901246 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/901246
Process for patterning non-photoimagable ceramic tape Jul 8, 2001 Issued
Array ( [id] => 6650237 [patent_doc_number] => 20030008243 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-09 [patent_title] => 'Copper electroless deposition technology for ULSI metalization' [patent_app_type] => new [patent_app_number] => 09/901001 [patent_app_country] => US [patent_app_date] => 2001-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4808 [patent_no_of_claims] => 65 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0008/20030008243.pdf [firstpage_image] =>[orig_patent_app_number] => 09901001 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/901001
Copper electroless deposition technology for ULSI metalization Jul 8, 2001 Abandoned
Array ( [id] => 714868 [patent_doc_number] => 07052824 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-30 [patent_title] => 'Process for thick film circuit patterning' [patent_app_type] => utility [patent_app_number] => 10/275183 [patent_app_country] => US [patent_app_date] => 2001-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 8181 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/052/07052824.pdf [firstpage_image] =>[orig_patent_app_number] => 10275183 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/275183
Process for thick film circuit patterning Jun 25, 2001 Issued
Array ( [id] => 7092826 [patent_doc_number] => 20010033997 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-25 [patent_title] => 'Semiconductor processing methods' [patent_app_type] => new [patent_app_number] => 09/885393 [patent_app_country] => US [patent_app_date] => 2001-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2078 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20010033997.pdf [firstpage_image] =>[orig_patent_app_number] => 09885393 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/885393
Semiconductor processing methods Jun 18, 2001 Issued
Array ( [id] => 6896116 [patent_doc_number] => 20010026906 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-04 [patent_title] => 'Process for manufacturing semiconductor device and exposure mask' [patent_app_type] => new [patent_app_number] => 09/875037 [patent_app_country] => US [patent_app_date] => 2001-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2497 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20010026906.pdf [firstpage_image] =>[orig_patent_app_number] => 09875037 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/875037
Process for manufacturing semiconductor device and exposure mask Jun 6, 2001 Abandoned
Array ( [id] => 6405033 [patent_doc_number] => 20020182549 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-05 [patent_title] => 'Alternate exposure method for improving photolithography resolution' [patent_app_type] => new [patent_app_number] => 09/870529 [patent_app_country] => US [patent_app_date] => 2001-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2850 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0182/20020182549.pdf [firstpage_image] =>[orig_patent_app_number] => 09870529 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/870529
Alternate exposure method for improving photolithography resolution May 30, 2001 Abandoned
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