Search

Kyle M. Riddle

Examiner (ID: 16842)

Most Active Art Unit
3748
Art Unit(s)
3748
Total Applications
452
Issued Applications
387
Pending Applications
7
Abandoned Applications
58

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10808603 [patent_doc_number] => 20160154761 [patent_country] => US [patent_kind] => A9 [patent_issue_date] => 2016-06-02 [patent_title] => 'METHOD OF CONNECTING A PCIe BUS EXTENSION SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/175627 [patent_app_country] => US [patent_app_date] => 2014-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3936 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14175627 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/175627
Method of connecting a PCIe bus extension system Feb 6, 2014 Issued
Array ( [id] => 11614569 [patent_doc_number] => 09652426 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-16 [patent_title] => 'Method, device, system and storage medium for implementing packet transmission in PCIE switching network' [patent_app_type] => utility [patent_app_number] => 14/144328 [patent_app_country] => US [patent_app_date] => 2013-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 22 [patent_no_of_words] => 25584 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14144328 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/144328
Method, device, system and storage medium for implementing packet transmission in PCIE switching network Dec 29, 2013 Issued
Array ( [id] => 11723927 [patent_doc_number] => 09696779 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-04 [patent_title] => 'Integrated circuit, electronic device and operation method thereof' [patent_app_type] => utility [patent_app_number] => 14/093313 [patent_app_country] => US [patent_app_date] => 2013-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8568 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14093313 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/093313
Integrated circuit, electronic device and operation method thereof Nov 28, 2013 Issued
Array ( [id] => 10053247 [patent_doc_number] => 09093127 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-07-28 [patent_title] => 'Method and apparatus for warming up integrated circuits' [patent_app_type] => utility [patent_app_number] => 14/058985 [patent_app_country] => US [patent_app_date] => 2013-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4128 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14058985 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/058985
Method and apparatus for warming up integrated circuits Oct 20, 2013 Issued
Array ( [id] => 12214008 [patent_doc_number] => 09910818 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-06 [patent_title] => 'Serdes interface architecture for multi-processor systems' [patent_app_type] => utility [patent_app_number] => 14/043920 [patent_app_country] => US [patent_app_date] => 2013-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5496 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 293 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14043920 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/043920
Serdes interface architecture for multi-processor systems Oct 1, 2013 Issued
Array ( [id] => 10210549 [patent_doc_number] => 20150095540 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-02 [patent_title] => 'EXTERNAL DEVICE AND A TRANSMISSION SYSTEM AND THE METHOD OF THE HETEROGENEOUS DEVICE' [patent_app_type] => utility [patent_app_number] => 14/042866 [patent_app_country] => US [patent_app_date] => 2013-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3149 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14042866 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/042866
EXTERNAL DEVICE AND A TRANSMISSION SYSTEM AND THE METHOD OF THE HETEROGENEOUS DEVICE Sep 30, 2013 Abandoned
Array ( [id] => 9398343 [patent_doc_number] => 20140095749 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-03 [patent_title] => 'METHOD FOR ADDRESSING THE PARTICIPANTS OF A BUS SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/043186 [patent_app_country] => US [patent_app_date] => 2013-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 13083 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14043186 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/043186
Method for addressing the participants of a bus system Sep 30, 2013 Issued
Array ( [id] => 9398344 [patent_doc_number] => 20140095750 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-03 [patent_title] => 'Method for Managing the Operation of a Circuit Connected to a Two-Wire Bus' [patent_app_type] => utility [patent_app_number] => 14/042344 [patent_app_country] => US [patent_app_date] => 2013-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5966 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14042344 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/042344
Method for managing the operation of a circuit connected to a two-wire bus Sep 29, 2013 Issued
Array ( [id] => 10210696 [patent_doc_number] => 20150095687 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-02 [patent_title] => 'POWER CONTROL TECHNIQUES FOR INTEGRATED PCIE CONTROLLERS' [patent_app_type] => utility [patent_app_number] => 14/040316 [patent_app_country] => US [patent_app_date] => 2013-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 12768 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14040316 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/040316
Power control techniques for integrated PCIe controllers Sep 26, 2013 Issued
Array ( [id] => 13004159 [patent_doc_number] => 10025748 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-17 [patent_title] => Lane division multiplexing of an I/O link [patent_app_type] => utility [patent_app_number] => 14/040421 [patent_app_country] => US [patent_app_date] => 2013-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5839 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14040421 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/040421
Lane division multiplexing of an I/O link Sep 26, 2013 Issued
Array ( [id] => 9386551 [patent_doc_number] => 20140090034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-27 [patent_title] => 'SMART PLUG OR CRADLE' [patent_app_type] => utility [patent_app_number] => 14/036448 [patent_app_country] => US [patent_app_date] => 2013-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8901 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14036448 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/036448
SMART PLUG OR CRADLE Sep 24, 2013 Abandoned
Array ( [id] => 9919095 [patent_doc_number] => 20150074300 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-12 [patent_title] => 'MOBILE COMPUTING DEVICE AND METHOD OF TRANSMITTING DATA THEREFROM' [patent_app_type] => utility [patent_app_number] => 14/025521 [patent_app_country] => US [patent_app_date] => 2013-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4123 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14025521 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/025521
Mobile computing device and method of transmitting data therefrom Sep 11, 2013 Issued
Array ( [id] => 11659172 [patent_doc_number] => 09672175 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-06 [patent_title] => 'Communication system' [patent_app_type] => utility [patent_app_number] => 14/018456 [patent_app_country] => US [patent_app_date] => 2013-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 6826 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 527 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14018456 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/018456
Communication system Sep 4, 2013 Issued
Array ( [id] => 9912014 [patent_doc_number] => 20150067217 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-05 [patent_title] => 'SELECTING I/O INTERRUPT TARGET FOR MULTI-CORE SERVER SYSTEMS' [patent_app_type] => utility [patent_app_number] => 14/017974 [patent_app_country] => US [patent_app_date] => 2013-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6964 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14017974 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/017974
Selecting I/O interrupt target for multi-core server systems Sep 3, 2013 Issued
Array ( [id] => 9912031 [patent_doc_number] => 20150067234 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-05 [patent_title] => 'UNIFIED MEMORY CONTROLLER FOR HETEROGENEOUS MEMORY ON A MULTI-CHIP PACKAGE' [patent_app_type] => utility [patent_app_number] => 14/016717 [patent_app_country] => US [patent_app_date] => 2013-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4042 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14016717 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/016717
Unified memory controller for heterogeneous memory on a multi-chip package Sep 2, 2013 Issued
Array ( [id] => 11739162 [patent_doc_number] => 09703745 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-11 [patent_title] => 'Storage device and motherboard able to support the storage device' [patent_app_type] => utility [patent_app_number] => 14/014526 [patent_app_country] => US [patent_app_date] => 2013-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1294 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14014526 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/014526
Storage device and motherboard able to support the storage device Aug 29, 2013 Issued
Array ( [id] => 9644939 [patent_doc_number] => 20140223052 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-07 [patent_title] => 'SYSTEM AND METHOD FOR SLAVE-BASED MEMORY PROTECTION' [patent_app_type] => utility [patent_app_number] => 14/015690 [patent_app_country] => US [patent_app_date] => 2013-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5605 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14015690 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/015690
SYSTEM AND METHOD FOR SLAVE-BASED MEMORY PROTECTION Aug 29, 2013 Abandoned
Array ( [id] => 15167675 [patent_doc_number] => 10489332 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-26 [patent_title] => System and method for per-task memory protection for a non-programmable bus master [patent_app_type] => utility [patent_app_number] => 14/015561 [patent_app_country] => US [patent_app_date] => 2013-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 4253 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14015561 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/015561
System and method for per-task memory protection for a non-programmable bus master Aug 29, 2013 Issued
Array ( [id] => 9912006 [patent_doc_number] => 20150067209 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-05 [patent_title] => 'METHOD AND CIRCUIT FOR DETECTING USB 3.0 LFPS SIGNAL' [patent_app_type] => utility [patent_app_number] => 14/013634 [patent_app_country] => US [patent_app_date] => 2013-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5908 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14013634 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/013634
Method and circuit for detecting USB 3.0 LFPS signal Aug 28, 2013 Issued
Array ( [id] => 11418276 [patent_doc_number] => 09565116 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-07 [patent_title] => 'Executing variable-priority jobs using multiple statistical thresholds in cellular networks' [patent_app_type] => utility [patent_app_number] => 14/013645 [patent_app_country] => US [patent_app_date] => 2013-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6490 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14013645 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/013645
Executing variable-priority jobs using multiple statistical thresholds in cellular networks Aug 28, 2013 Issued
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