| Application number | Title of the application | Filing Date | Status |
|---|
Array
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[patent_issue_date] => 1990-05-08
[patent_title] => 'Method of fabricating a semiconductor device by capping a conductive layer with a nitride layer'
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[patent_app_number] => 7/356021
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Array
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[patent_kind] => NA
[patent_issue_date] => 1991-05-28
[patent_title] => 'Process for selectively growing thin metallic film of copper or gold'
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[patent_app_date] => 1989-05-19
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[firstpage_image] =>[orig_patent_app_number] => 354158
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Array
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[patent_doc_number] => 05077238
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-12-31
[patent_title] => 'Method of manufacturing a semiconductor device with a planar interlayer insulating film'
[patent_app_type] => 1
[patent_app_number] => 7/353892
[patent_app_country] => US
[patent_app_date] => 1989-05-18
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[firstpage_image] =>[orig_patent_app_number] => 353892
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/353892 | Method of manufacturing a semiconductor device with a planar interlayer insulating film | May 17, 1989 | Issued |
Array
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[patent_doc_number] => 05094975
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-03-10
[patent_title] => 'Method of making microscopic multiprobes'
[patent_app_type] => 1
[patent_app_number] => 7/352573
[patent_app_country] => US
[patent_app_date] => 1989-05-16
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[firstpage_image] =>[orig_patent_app_number] => 352573
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Array
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[id] => 2656549
[patent_doc_number] => 04962060
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[patent_kind] => NA
[patent_issue_date] => 1990-10-09
[patent_title] => 'Making a high speed interconnect system with refractory non-dogbone contacts and an active electromigration suppression mechanism'
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Array
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[id] => 2595353
[patent_doc_number] => 04923825
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-05-08
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[firstpage_image] =>[orig_patent_app_number] => 345747
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/345747 | Method of treating a semiconductor body | Apr 30, 1989 | Issued |
| 07/333650 | IMPURITY - INDUCED SEEDING OF POLYCRYSTALLINE SEMICONDUCTORS | Apr 4, 1989 | Abandoned |
Array
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[patent_issue_date] => 1990-08-28
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[pdf_file] => patents/04/952/04952526.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/333083 | Method for the fabrication of an alternation of layers of monocrystalline semiconducting material and layers of insulating material | Apr 3, 1989 | Issued |
Array
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[id] => 2632432
[patent_doc_number] => 04977104
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[patent_kind] => NA
[patent_issue_date] => 1990-12-11
[patent_title] => 'Method for producing a semiconductor device by filling hollows with thermally decomposed doped and undoped polysilicon'
[patent_app_type] => 1
[patent_app_number] => 7/327538
[patent_app_country] => US
[patent_app_date] => 1989-03-23
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[pdf_file] => patents/04/977/04977104.pdf
[firstpage_image] =>[orig_patent_app_number] => 327538
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/327538 | Method for producing a semiconductor device by filling hollows with thermally decomposed doped and undoped polysilicon | Mar 22, 1989 | Issued |
Array
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[id] => 2871488
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[patent_issue_date] => 1992-02-25
[patent_title] => 'Multilevel resist plated transfer layer process for fine line lithography'
[patent_app_type] => 1
[patent_app_number] => 7/315351
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/315351 | Multilevel resist plated transfer layer process for fine line lithography | Feb 23, 1989 | Issued |
Array
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[id] => 2742697
[patent_doc_number] => 05023204
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-06-11
[patent_title] => 'Method of manufacturing semiconductor device using silicone protective layer'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/298950 | Method of manufacturing semiconductor device using silicone protective layer | Jan 18, 1989 | Issued |
Array
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[id] => 2766380
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[patent_kind] => NA
[patent_issue_date] => 1991-11-05
[patent_title] => 'Method for manufacturing a planar electrical interconnection utilizing isotropic deposition of conductive material'
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[patent_app_date] => 1988-12-16
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/287582 | Method for manufacturing a planar electrical interconnection utilizing isotropic deposition of conductive material | Dec 15, 1988 | Issued |
| 07/278088 | METHOD FOR SELECTIVELY DEPOSITING REFRACTORY METAL ON SEMICONDUCTOR SUBSTRATES | Nov 29, 1988 | Abandoned |
| 07/275755 | METHOD FOR FORMING A FINE PATTERN BY USING A PATTERNED RESIST LAYER | Nov 22, 1988 | Abandoned |
Array
(
[id] => 2623724
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[patent_issue_date] => 1990-09-11
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/269803 | Thin oxide sidewall insulators for silicon-over-insulator transistors | Nov 9, 1988 | Issued |
| 07/225494 | METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE | Jul 27, 1988 | Abandoned |
Array
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[id] => 2636450
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[patent_issue_date] => 1990-04-03
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Array
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[patent_kind] => NA
[patent_issue_date] => 1991-03-19
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/213102 | Method of fabricating complementary semiconductor integrated circuits devices having an increased immunity to latch-up | Jun 27, 1988 | Issued |