
Lalrinfamkim Hmar Malsawma
Examiner (ID: 2370)
| Most Active Art Unit | 2892 |
| Art Unit(s) | 2823, 2892, 2825 |
| Total Applications | 1951 |
| Issued Applications | 1709 |
| Pending Applications | 105 |
| Abandoned Applications | 179 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9575947
[patent_doc_number] => 08766364
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-07-01
[patent_title] => 'Fin field effect transistor layout for stress optimization'
[patent_app_type] => utility
[patent_app_number] => 13/600369
[patent_app_country] => US
[patent_app_date] => 2012-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 7055
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13600369
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/600369 | Fin field effect transistor layout for stress optimization | Aug 30, 2012 | Issued |
Array
(
[id] => 9582806
[patent_doc_number] => 08772809
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-07-08
[patent_title] => 'Semiconductor light emitting device'
[patent_app_type] => utility
[patent_app_number] => 13/599853
[patent_app_country] => US
[patent_app_date] => 2012-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 24
[patent_no_of_words] => 6656
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13599853
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/599853 | Semiconductor light emitting device | Aug 29, 2012 | Issued |
Array
(
[id] => 11265940
[patent_doc_number] => 09490243
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-11-08
[patent_title] => 'Semiconductor device comprising an ESD protection device, an ESD protection circuitry, an integrated circuit and a method of manufacturing a semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 14/419064
[patent_app_country] => US
[patent_app_date] => 2012-08-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 13
[patent_no_of_words] => 7671
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 176
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14419064
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/419064 | Semiconductor device comprising an ESD protection device, an ESD protection circuitry, an integrated circuit and a method of manufacturing a semiconductor device | Aug 21, 2012 | Issued |
Array
(
[id] => 8838770
[patent_doc_number] => 20130134399
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-05-30
[patent_title] => 'ORGANIC THIN FILM TRANSISTOR ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME, AND DISPLAY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/698906
[patent_app_country] => US
[patent_app_date] => 2012-08-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4121
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13698906
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/698906 | Organic thin film transistor array substrate and method for manufacturing the same, and display device | Aug 12, 2012 | Issued |
Array
(
[id] => 8501011
[patent_doc_number] => 20120300419
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-11-29
[patent_title] => 'INTERMEDIATE STRUCTURE, METHOD AND SUBSTRATE FOR FABRICATING FLEXIBLE DISPLAY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/571477
[patent_app_country] => US
[patent_app_date] => 2012-08-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2493
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13571477
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/571477 | Intermediate structure, method and substrate for fabricating flexible display device | Aug 9, 2012 | Issued |
Array
(
[id] => 8773007
[patent_doc_number] => 08426966
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2013-04-23
[patent_title] => 'Bumped chip package'
[patent_app_type] => utility
[patent_app_number] => 13/569865
[patent_app_country] => US
[patent_app_date] => 2012-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 26
[patent_no_of_words] => 7795
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 64
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13569865
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/569865 | Bumped chip package | Aug 7, 2012 | Issued |
Array
(
[id] => 8653424
[patent_doc_number] => 08373173
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-02-12
[patent_title] => 'Method of manufacturing thin film transistor'
[patent_app_type] => utility
[patent_app_number] => 13/567196
[patent_app_country] => US
[patent_app_date] => 2012-08-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 48
[patent_no_of_words] => 11879
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 343
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13567196
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/567196 | Method of manufacturing thin film transistor | Aug 5, 2012 | Issued |
Array
(
[id] => 8499548
[patent_doc_number] => 20120298956
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-11-29
[patent_title] => 'Method of Separating Light-Emitting Diode from a Growth Substrate'
[patent_app_type] => utility
[patent_app_number] => 13/567734
[patent_app_country] => US
[patent_app_date] => 2012-08-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3952
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13567734
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/567734 | Method of separating light-emitting diode from a growth substrate | Aug 5, 2012 | Issued |
Array
(
[id] => 8486800
[patent_doc_number] => 20120286208
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-11-15
[patent_title] => 'PHOSPHOR INK COMPOSITION'
[patent_app_type] => utility
[patent_app_number] => 13/561104
[patent_app_country] => US
[patent_app_date] => 2012-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 5626
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13561104
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/561104 | Phosphor ink composition | Jul 29, 2012 | Issued |
Array
(
[id] => 9060386
[patent_doc_number] => 08546825
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-10-01
[patent_title] => 'Light emitting device'
[patent_app_type] => utility
[patent_app_number] => 13/555292
[patent_app_country] => US
[patent_app_date] => 2012-07-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 38
[patent_no_of_words] => 15177
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13555292
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/555292 | Light emitting device | Jul 22, 2012 | Issued |
Array
(
[id] => 9060386
[patent_doc_number] => 08546825
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-10-01
[patent_title] => 'Light emitting device'
[patent_app_type] => utility
[patent_app_number] => 13/555292
[patent_app_country] => US
[patent_app_date] => 2012-07-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 38
[patent_no_of_words] => 15177
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13555292
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/555292 | Light emitting device | Jul 22, 2012 | Issued |
Array
(
[id] => 8772298
[patent_doc_number] => 08426252
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-04-23
[patent_title] => 'Wafer level package having a stress relief spacer and manufacturing method thereof'
[patent_app_type] => utility
[patent_app_number] => 13/537953
[patent_app_country] => US
[patent_app_date] => 2012-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 7013
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13537953
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/537953 | Wafer level package having a stress relief spacer and manufacturing method thereof | Jun 28, 2012 | Issued |
Array
(
[id] => 9582824
[patent_doc_number] => 08772827
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-07-08
[patent_title] => 'Semiconductor device and manufacturing method'
[patent_app_type] => utility
[patent_app_number] => 13/491581
[patent_app_country] => US
[patent_app_date] => 2012-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 46
[patent_figures_cnt] => 59
[patent_no_of_words] => 23324
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 307
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13491581
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/491581 | Semiconductor device and manufacturing method | Jun 6, 2012 | Issued |
Array
(
[id] => 8403237
[patent_doc_number] => 20120235295
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-09-20
[patent_title] => 'BARRIER-METAL-FREE COPPER DAMASCENE TECHNOLOGY USING ENHANCED REFLOW'
[patent_app_type] => utility
[patent_app_number] => 13/484824
[patent_app_country] => US
[patent_app_date] => 2012-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4354
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13484824
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/484824 | Barrier-metal-free copper damascene technology using enhanced reflow | May 30, 2012 | Issued |
Array
(
[id] => 8403104
[patent_doc_number] => 20120235160
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-09-20
[patent_title] => 'Normally-Off Semiconductor Devices'
[patent_app_type] => utility
[patent_app_number] => 13/483737
[patent_app_country] => US
[patent_app_date] => 2012-05-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 10617
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13483737
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/483737 | Normally-off semiconductor devices | May 29, 2012 | Issued |
Array
(
[id] => 8749937
[patent_doc_number] => 08415771
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2013-04-09
[patent_title] => 'Micro device transfer head with silicon electrode'
[patent_app_type] => utility
[patent_app_number] => 13/481592
[patent_app_country] => US
[patent_app_date] => 2012-05-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 69
[patent_no_of_words] => 9896
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13481592
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/481592 | Micro device transfer head with silicon electrode | May 24, 2012 | Issued |
Array
(
[id] => 9469590
[patent_doc_number] => 08723223
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-05-13
[patent_title] => 'Hybrid Fin field-effect transistors'
[patent_app_type] => utility
[patent_app_number] => 13/463869
[patent_app_country] => US
[patent_app_date] => 2012-05-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 25
[patent_no_of_words] => 5572
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 163
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13463869
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/463869 | Hybrid Fin field-effect transistors | May 3, 2012 | Issued |
Array
(
[id] => 8414298
[patent_doc_number] => 20120241798
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-09-27
[patent_title] => 'III-V LIGHT EMITTING DEVICE INCLUDING A LIGHT EXTRACTING STRUCTURE'
[patent_app_type] => utility
[patent_app_number] => 13/459279
[patent_app_country] => US
[patent_app_date] => 2012-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5502
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13459279
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/459279 | III-V light emitting device including a light extracting structure | Apr 29, 2012 | Issued |
Array
(
[id] => 9121552
[patent_doc_number] => 20130288474
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-10-31
[patent_title] => 'METHODS FOR FABRICATING DUAL DAMASCENE INTERCONNECT STRUCTURES'
[patent_app_type] => utility
[patent_app_number] => 13/458172
[patent_app_country] => US
[patent_app_date] => 2012-04-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4846
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13458172
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/458172 | METHODS FOR FABRICATING DUAL DAMASCENE INTERCONNECT STRUCTURES | Apr 26, 2012 | Abandoned |
Array
(
[id] => 10870131
[patent_doc_number] => 08895325
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-11-25
[patent_title] => 'System and method for aligning substrates for multiple implants'
[patent_app_type] => utility
[patent_app_number] => 13/458441
[patent_app_country] => US
[patent_app_date] => 2012-04-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 13
[patent_no_of_words] => 4846
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 77
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13458441
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/458441 | System and method for aligning substrates for multiple implants | Apr 26, 2012 | Issued |