Search

Lalrinfamkim Hmar Malsawma

Examiner (ID: 2370)

Most Active Art Unit
2892
Art Unit(s)
2823, 2892, 2825
Total Applications
1951
Issued Applications
1709
Pending Applications
105
Abandoned Applications
179

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8846101 [patent_doc_number] => 08455280 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-06-04 [patent_title] => 'Method for manufacturing light emitting diodes' [patent_app_type] => utility [patent_app_number] => 13/457565 [patent_app_country] => US [patent_app_date] => 2012-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 938 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13457565 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/457565
Method for manufacturing light emitting diodes Apr 26, 2012 Issued
Array ( [id] => 8989956 [patent_doc_number] => 20130217237 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-22 [patent_title] => 'SPIN-ON DIELECTRIC METHOD WITH MULTI-STAGE RAMPING TEMPERATURE' [patent_app_type] => utility [patent_app_number] => 13/457765 [patent_app_country] => US [patent_app_date] => 2012-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3191 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13457765 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/457765
SPIN-ON DIELECTRIC METHOD WITH MULTI-STAGE RAMPING TEMPERATURE Apr 26, 2012 Abandoned
Array ( [id] => 9344978 [patent_doc_number] => 08664126 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-04 [patent_title] => 'Selective deposition of polymer films on bare silicon instead of oxide surface' [patent_app_type] => utility [patent_app_number] => 13/456524 [patent_app_country] => US [patent_app_date] => 2012-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4237 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13456524 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/456524
Selective deposition of polymer films on bare silicon instead of oxide surface Apr 25, 2012 Issued
Array ( [id] => 8955731 [patent_doc_number] => 08501503 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-06 [patent_title] => 'Methods of inspecting and manufacturing semiconductor wafers' [patent_app_type] => utility [patent_app_number] => 13/457219 [patent_app_country] => US [patent_app_date] => 2012-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 10777 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13457219 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/457219
Methods of inspecting and manufacturing semiconductor wafers Apr 25, 2012 Issued
Array ( [id] => 8446697 [patent_doc_number] => 08288749 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-16 [patent_title] => 'Schottky diode switch and memory units containing the same' [patent_app_type] => utility [patent_app_number] => 13/445351 [patent_app_country] => US [patent_app_date] => 2012-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 21 [patent_no_of_words] => 8478 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13445351 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/445351
Schottky diode switch and memory units containing the same Apr 11, 2012 Issued
Array ( [id] => 8689808 [patent_doc_number] => 08389335 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-05 [patent_title] => 'Chip Scale Package structure with can attachment' [patent_app_type] => utility [patent_app_number] => 13/424610 [patent_app_country] => US [patent_app_date] => 2012-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 2826 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13424610 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/424610
Chip Scale Package structure with can attachment Mar 19, 2012 Issued
Array ( [id] => 8299146 [patent_doc_number] => 20120181704 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-19 [patent_title] => 'SEMICONDUCTOR MODULE WITH MICRO-BUFFERS' [patent_app_type] => utility [patent_app_number] => 13/420341 [patent_app_country] => US [patent_app_date] => 2012-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3647 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13420341 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/420341
Semiconductor module with micro-buffers Mar 13, 2012 Issued
Array ( [id] => 9202414 [patent_doc_number] => 20140001591 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-02 [patent_title] => 'PHOTODIODE CARRIER AND PHOTO SENSOR USING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/982063 [patent_app_country] => US [patent_app_date] => 2012-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6478 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13982063 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/982063
Photodiode carrier and photo sensor using the same Mar 8, 2012 Issued
Array ( [id] => 8232744 [patent_doc_number] => 08198181 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-06-12 [patent_title] => 'Schottky diode switch and memory units containing the same' [patent_app_type] => utility [patent_app_number] => 13/400364 [patent_app_country] => US [patent_app_date] => 2012-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 21 [patent_no_of_words] => 8476 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/198/08198181.pdf [firstpage_image] =>[orig_patent_app_number] => 13400364 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/400364
Schottky diode switch and memory units containing the same Feb 19, 2012 Issued
Array ( [id] => 8533789 [patent_doc_number] => 08309945 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-13 [patent_title] => 'Programmable metallization memory cell with planarized silver electrode' [patent_app_type] => utility [patent_app_number] => 13/396731 [patent_app_country] => US [patent_app_date] => 2012-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3724 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13396731 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/396731
Programmable metallization memory cell with planarized silver electrode Feb 14, 2012 Issued
Array ( [id] => 8446203 [patent_doc_number] => 08288254 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-16 [patent_title] => 'Programmable metallization memory cell with planarized silver electrode' [patent_app_type] => utility [patent_app_number] => 13/368851 [patent_app_country] => US [patent_app_date] => 2012-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3726 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13368851 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/368851
Programmable metallization memory cell with planarized silver electrode Feb 7, 2012 Issued
Array ( [id] => 9086245 [patent_doc_number] => 08557672 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-15 [patent_title] => 'Dielectrics containing at least one of a refractory metal or a non-refractory metal' [patent_app_type] => utility [patent_app_number] => 13/368206 [patent_app_country] => US [patent_app_date] => 2012-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 22 [patent_no_of_words] => 16812 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13368206 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/368206
Dielectrics containing at least one of a refractory metal or a non-refractory metal Feb 6, 2012 Issued
Array ( [id] => 9158676 [patent_doc_number] => 20130306953 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-21 [patent_title] => 'METHOD FOR PRODUCING ELECTROLUMINESCENCE DEVICE' [patent_app_type] => utility [patent_app_number] => 13/981966 [patent_app_country] => US [patent_app_date] => 2012-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 15381 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13981966 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/981966
Method for producing electroluminescence device Jan 31, 2012 Issued
Array ( [id] => 8328557 [patent_doc_number] => 08236653 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-07 [patent_title] => 'Configuration and method to form MOSFET devices with low resistance silicide gate and mesa contact regions' [patent_app_type] => utility [patent_app_number] => 13/361950 [patent_app_country] => US [patent_app_date] => 2012-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 25 [patent_no_of_words] => 3185 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13361950 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/361950
Configuration and method to form MOSFET devices with low resistance silicide gate and mesa contact regions Jan 30, 2012 Issued
Array ( [id] => 8469689 [patent_doc_number] => 08298866 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-10-30 [patent_title] => 'Wafer level package and fabrication method' [patent_app_type] => utility [patent_app_number] => 13/358947 [patent_app_country] => US [patent_app_date] => 2012-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 7347 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13358947 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/358947
Wafer level package and fabrication method Jan 25, 2012 Issued
Array ( [id] => 8422276 [patent_doc_number] => 08278764 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-10-02 [patent_title] => 'Stub minimization for multi-die wirebond assemblies with orthogonal windows' [patent_app_type] => utility [patent_app_number] => 13/354772 [patent_app_country] => US [patent_app_date] => 2012-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 37 [patent_no_of_words] => 22176 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13354772 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/354772
Stub minimization for multi-die wirebond assemblies with orthogonal windows Jan 19, 2012 Issued
Array ( [id] => 8876365 [patent_doc_number] => 08471332 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-25 [patent_title] => 'Enhancing Schottky breakdown voltage (BV) without affecting an integrated MOSFET-Schottky device layout' [patent_app_type] => utility [patent_app_number] => 13/349288 [patent_app_country] => US [patent_app_date] => 2012-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 42 [patent_no_of_words] => 5650 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13349288 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/349288
Enhancing Schottky breakdown voltage (BV) without affecting an integrated MOSFET-Schottky device layout Jan 11, 2012 Issued
Array ( [id] => 8896621 [patent_doc_number] => 08476143 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-02 [patent_title] => 'Deep contacts of integrated electronic devices based on regions implanted through trenches' [patent_app_type] => utility [patent_app_number] => 13/349416 [patent_app_country] => US [patent_app_date] => 2012-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 6931 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13349416 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/349416
Deep contacts of integrated electronic devices based on regions implanted through trenches Jan 11, 2012 Issued
Array ( [id] => 8896621 [patent_doc_number] => 08476143 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-02 [patent_title] => 'Deep contacts of integrated electronic devices based on regions implanted through trenches' [patent_app_type] => utility [patent_app_number] => 13/349416 [patent_app_country] => US [patent_app_date] => 2012-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 6931 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13349416 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/349416
Deep contacts of integrated electronic devices based on regions implanted through trenches Jan 11, 2012 Issued
Array ( [id] => 8317866 [patent_doc_number] => 08232644 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-31 [patent_title] => 'Wafer level package having a stress relief spacer and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 13/346191 [patent_app_country] => US [patent_app_date] => 2012-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 6981 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13346191 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/346191
Wafer level package having a stress relief spacer and manufacturing method thereof Jan 8, 2012 Issued
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