Search

Lalrinfamkim Hmar Malsawma

Examiner (ID: 5479)

Most Active Art Unit
2892
Art Unit(s)
2825, 2892, 2823
Total Applications
2001
Issued Applications
1735
Pending Applications
112
Abandoned Applications
179

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6224662 [patent_doc_number] => 20100181571 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-22 [patent_title] => 'LAMINATE STRUCTURE, ELECTRONIC DEVICE, AND DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/669290 [patent_app_country] => US [patent_app_date] => 2008-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 23794 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0181/20100181571.pdf [firstpage_image] =>[orig_patent_app_number] => 12669290 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/669290
Laminate structure, electronic device, and display device Jul 14, 2008 Issued
Array ( [id] => 8375813 [patent_doc_number] => 08258611 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-04 [patent_title] => 'Leadframe structure for electronic packages' [patent_app_type] => utility [patent_app_number] => 12/669338 [patent_app_country] => US [patent_app_date] => 2008-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2598 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12669338 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/669338
Leadframe structure for electronic packages Jul 14, 2008 Issued
Array ( [id] => 4604978 [patent_doc_number] => 07985959 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-07-26 [patent_title] => 'Self-aligned vertical bipolar junction transistor for phase change memories' [patent_app_type] => utility [patent_app_number] => 12/218171 [patent_app_country] => US [patent_app_date] => 2008-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 2563 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/985/07985959.pdf [firstpage_image] =>[orig_patent_app_number] => 12218171 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/218171
Self-aligned vertical bipolar junction transistor for phase change memories Jul 10, 2008 Issued
Array ( [id] => 4445798 [patent_doc_number] => 07863613 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-04 [patent_title] => 'Thin film transistor array of horizontal electronic field applying type and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 12/216681 [patent_app_country] => US [patent_app_date] => 2008-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4738 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/863/07863613.pdf [firstpage_image] =>[orig_patent_app_number] => 12216681 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/216681
Thin film transistor array of horizontal electronic field applying type and method for fabricating the same Jul 8, 2008 Issued
Array ( [id] => 4859726 [patent_doc_number] => 20080268576 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-30 [patent_title] => 'METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/169921 [patent_app_country] => US [patent_app_date] => 2008-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 11184 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0268/20080268576.pdf [firstpage_image] =>[orig_patent_app_number] => 12169921 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/169921
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE Jul 8, 2008 Abandoned
Array ( [id] => 8797535 [patent_doc_number] => 08436407 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-07 [patent_title] => 'Photoelectric conversion device and imaging system using photoelectric conversion device' [patent_app_type] => utility [patent_app_number] => 12/168492 [patent_app_country] => US [patent_app_date] => 2008-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 5340 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 395 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12168492 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/168492
Photoelectric conversion device and imaging system using photoelectric conversion device Jul 6, 2008 Issued
Array ( [id] => 6480997 [patent_doc_number] => 20100258555 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-14 [patent_title] => 'DIRECT CURRENT ELECTROMAGNETIC HEATING ELEMENT' [patent_app_type] => utility [patent_app_number] => 12/745702 [patent_app_country] => US [patent_app_date] => 2008-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3078 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0258/20100258555.pdf [firstpage_image] =>[orig_patent_app_number] => 12745702 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/745702
DIRECT CURRENT ELECTROMAGNETIC HEATING ELEMENT Jul 2, 2008 Abandoned
Array ( [id] => 4586915 [patent_doc_number] => 07851882 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-14 [patent_title] => 'Silicon carbide semiconductor device having junction barrier schottky diode' [patent_app_type] => utility [patent_app_number] => 12/216182 [patent_app_country] => US [patent_app_date] => 2008-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 4577 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/851/07851882.pdf [firstpage_image] =>[orig_patent_app_number] => 12216182 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/216182
Silicon carbide semiconductor device having junction barrier schottky diode Jun 30, 2008 Issued
Array ( [id] => 8555736 [patent_doc_number] => 08330211 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-11 [patent_title] => 'Semiconductor device with vertical channel transistor and low sheet resistance and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 12/165382 [patent_app_country] => US [patent_app_date] => 2008-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 24 [patent_no_of_words] => 4768 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12165382 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/165382
Semiconductor device with vertical channel transistor and low sheet resistance and method for fabricating the same Jun 29, 2008 Issued
Array ( [id] => 4856462 [patent_doc_number] => 20080265312 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-30 [patent_title] => 'Enhancing Schottky breakdown voltage (BV) without affecting an integrated MOSFET-Schottky device layout' [patent_app_type] => utility [patent_app_number] => 12/217092 [patent_app_country] => US [patent_app_date] => 2008-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 5520 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0265/20080265312.pdf [firstpage_image] =>[orig_patent_app_number] => 12217092 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/217092
Enhancing Schottky breakdown voltage (BV) without affecting an integrated MOSFET-Schottky device layout Jun 29, 2008 Issued
Array ( [id] => 4451174 [patent_doc_number] => 07964497 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-06-21 [patent_title] => 'Structure to facilitate plating into high aspect ratio vias' [patent_app_type] => utility [patent_app_number] => 12/163172 [patent_app_country] => US [patent_app_date] => 2008-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2133 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/964/07964497.pdf [firstpage_image] =>[orig_patent_app_number] => 12163172 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/163172
Structure to facilitate plating into high aspect ratio vias Jun 26, 2008 Issued
Array ( [id] => 5288049 [patent_doc_number] => 20090020779 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-22 [patent_title] => 'Method of preparing a sealed light-emitting diode chip' [patent_app_type] => utility [patent_app_number] => 12/215281 [patent_app_country] => US [patent_app_date] => 2008-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6625 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20090020779.pdf [firstpage_image] =>[orig_patent_app_number] => 12215281 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/215281
Method of preparing a sealed light-emitting diode chip Jun 25, 2008 Issued
Array ( [id] => 5346023 [patent_doc_number] => 20090001384 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-01 [patent_title] => 'Group III Nitride semiconductor HFET and method for producing the same' [patent_app_type] => utility [patent_app_number] => 12/213882 [patent_app_country] => US [patent_app_date] => 2008-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2771 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20090001384.pdf [firstpage_image] =>[orig_patent_app_number] => 12213882 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/213882
Group III Nitride semiconductor HFET and method for producing the same Jun 24, 2008 Abandoned
Array ( [id] => 4663736 [patent_doc_number] => 20080254643 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-16 [patent_title] => 'STRUCTURE TO IMPROVE ADHESION BETWEEN TOP CVD LOW-K DIELECTRIC AND DIELECTRIC CAPPING LAYER' [patent_app_type] => utility [patent_app_number] => 12/143917 [patent_app_country] => US [patent_app_date] => 2008-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4961 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0254/20080254643.pdf [firstpage_image] =>[orig_patent_app_number] => 12143917 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/143917
Structure to improve adhesion between top CVD low-K dielectric and dielectric capping layer Jun 22, 2008 Issued
Array ( [id] => 142592 [patent_doc_number] => 07687829 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-30 [patent_title] => 'Stressed field effect transistors on hybrid orientation substrate' [patent_app_type] => utility [patent_app_number] => 12/144250 [patent_app_country] => US [patent_app_date] => 2008-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5232 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/687/07687829.pdf [firstpage_image] =>[orig_patent_app_number] => 12144250 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/144250
Stressed field effect transistors on hybrid orientation substrate Jun 22, 2008 Issued
Array ( [id] => 4849564 [patent_doc_number] => 20080315306 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-25 [patent_title] => 'Semiconductor Device and Method of Fabricating the Semiconductor Device' [patent_app_type] => utility [patent_app_number] => 12/144432 [patent_app_country] => US [patent_app_date] => 2008-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3007 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0315/20080315306.pdf [firstpage_image] =>[orig_patent_app_number] => 12144432 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/144432
Semiconductor device and method of fabricating the semiconductor device Jun 22, 2008 Issued
Array ( [id] => 5334451 [patent_doc_number] => 20090050915 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-26 [patent_title] => 'Group III-V nitride semiconductor substrate and method for producing same' [patent_app_type] => utility [patent_app_number] => 12/213391 [patent_app_country] => US [patent_app_date] => 2008-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3961 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0050/20090050915.pdf [firstpage_image] =>[orig_patent_app_number] => 12213391 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/213391
Group III-V nitride semiconductor substrate and method for producing same Jun 17, 2008 Abandoned
Array ( [id] => 5395050 [patent_doc_number] => 20090315113 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-24 [patent_title] => 'Low side zener reference voltage extended drain SCR clamps' [patent_app_type] => utility [patent_app_number] => 12/214392 [patent_app_country] => US [patent_app_date] => 2008-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1880 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0315/20090315113.pdf [firstpage_image] =>[orig_patent_app_number] => 12214392 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/214392
Low side zener reference voltage extended drain SCR clamps Jun 17, 2008 Issued
Array ( [id] => 6224638 [patent_doc_number] => 20100181564 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-22 [patent_title] => 'FUNCTIONAL MATERIAL FOR PRINTED ELECTRONIC COMPONENTS' [patent_app_type] => utility [patent_app_number] => 12/669239 [patent_app_country] => US [patent_app_date] => 2008-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3636 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0181/20100181564.pdf [firstpage_image] =>[orig_patent_app_number] => 12669239 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/669239
Functional material for printed electronic components Jun 16, 2008 Issued
Array ( [id] => 5413528 [patent_doc_number] => 20090039415 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-12 [patent_title] => 'Method of forming dielectric including dysprosium and scandium by atomic layer deposition and integrated circuit device including the dielectric layer' [patent_app_type] => utility [patent_app_number] => 12/153952 [patent_app_country] => US [patent_app_date] => 2008-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4603 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0039/20090039415.pdf [firstpage_image] =>[orig_patent_app_number] => 12153952 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/153952
Method of forming dielectric including dysprosium and scandium by atomic layer deposition and integrated circuit device including the dielectric layer May 27, 2008 Issued
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