Search

Lalrinfamkim Hmar Malsawma

Examiner (ID: 2370)

Most Active Art Unit
2892
Art Unit(s)
2823, 2892, 2825
Total Applications
1951
Issued Applications
1709
Pending Applications
105
Abandoned Applications
179

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 274589 [patent_doc_number] => 07560755 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-07-14 [patent_title] => 'Self aligned gate JFET structure and method' [patent_app_type] => utility [patent_app_number] => 11/450112 [patent_app_country] => US [patent_app_date] => 2006-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 28 [patent_no_of_words] => 9844 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/560/07560755.pdf [firstpage_image] =>[orig_patent_app_number] => 11450112 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/450112
Self aligned gate JFET structure and method Jun 8, 2006 Issued
Array ( [id] => 4614094 [patent_doc_number] => 07989823 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-02 [patent_title] => 'Light emitting system, light emitting apparatus and forming method thereof' [patent_app_type] => utility [patent_app_number] => 12/303916 [patent_app_country] => US [patent_app_date] => 2006-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 4836 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/989/07989823.pdf [firstpage_image] =>[orig_patent_app_number] => 12303916 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/303916
Light emitting system, light emitting apparatus and forming method thereof Jun 7, 2006 Issued
Array ( [id] => 151271 [patent_doc_number] => 07682864 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-23 [patent_title] => 'Method for fabricating organic electroluminescent device' [patent_app_type] => utility [patent_app_number] => 11/308884 [patent_app_country] => US [patent_app_date] => 2006-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 3938 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/682/07682864.pdf [firstpage_image] =>[orig_patent_app_number] => 11308884 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/308884
Method for fabricating organic electroluminescent device May 21, 2006 Issued
Array ( [id] => 421853 [patent_doc_number] => 07273784 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-09-25 [patent_title] => 'Scalable high density non-volatile memory cells in a contactless memory array' [patent_app_type] => utility [patent_app_number] => 11/435421 [patent_app_country] => US [patent_app_date] => 2006-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4409 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/273/07273784.pdf [firstpage_image] =>[orig_patent_app_number] => 11435421 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/435421
Scalable high density non-volatile memory cells in a contactless memory array May 16, 2006 Issued
Array ( [id] => 5253417 [patent_doc_number] => 20070134873 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-14 [patent_title] => 'DRAM CYLINDRICAL CAPACITOR AND METHOD OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/308804 [patent_app_country] => US [patent_app_date] => 2006-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2868 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0134/20070134873.pdf [firstpage_image] =>[orig_patent_app_number] => 11308804 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/308804
Fabricating method of DRAM cylindrical capacitor May 8, 2006 Issued
Array ( [id] => 5619595 [patent_doc_number] => 20060189129 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-24 [patent_title] => 'Method for applying metal features onto barrier layers using ion permeable barriers' [patent_app_type] => utility [patent_app_number] => 11/413228 [patent_app_country] => US [patent_app_date] => 2006-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 19267 [patent_no_of_claims] => 78 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0189/20060189129.pdf [firstpage_image] =>[orig_patent_app_number] => 11413228 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/413228
Method for applying metal features onto barrier layers using ion permeable barriers Apr 27, 2006 Abandoned
Array ( [id] => 185030 [patent_doc_number] => 07648919 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-01-19 [patent_title] => 'Integrated circuit fabrication' [patent_app_type] => utility [patent_app_number] => 11/407429 [patent_app_country] => US [patent_app_date] => 2006-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 6156 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/648/07648919.pdf [firstpage_image] =>[orig_patent_app_number] => 11407429 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/407429
Integrated circuit fabrication Apr 19, 2006 Issued
Array ( [id] => 5247436 [patent_doc_number] => 20070243670 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-18 [patent_title] => 'Thin Film Transistor (TFT) and Method for Fabricating the Same' [patent_app_type] => utility [patent_app_number] => 11/279933 [patent_app_country] => US [patent_app_date] => 2006-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 5549 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0243/20070243670.pdf [firstpage_image] =>[orig_patent_app_number] => 11279933 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/279933
Thin Film Transistor (TFT) and Method for Fabricating the Same Apr 16, 2006 Abandoned
Array ( [id] => 5675564 [patent_doc_number] => 20060180919 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-17 [patent_title] => 'FINE PITCH LOW COST FLIP CHIP SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 11/279972 [patent_app_country] => US [patent_app_date] => 2006-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2491 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0180/20060180919.pdf [firstpage_image] =>[orig_patent_app_number] => 11279972 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/279972
Fine pitch low cost flip chip substrate Apr 16, 2006 Issued
Array ( [id] => 5247454 [patent_doc_number] => 20070243688 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-18 [patent_title] => 'METHOD FOR FORMING STRAINED SEMICONDUCTOR DEVICE AND METHOD FOR FORMING SOURCE/DRAIN REGION' [patent_app_type] => utility [patent_app_number] => 11/308643 [patent_app_country] => US [patent_app_date] => 2006-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1492 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0243/20070243688.pdf [firstpage_image] =>[orig_patent_app_number] => 11308643 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/308643
Method for forming strained semiconductor device and method for forming source/drain region Apr 16, 2006 Issued
Array ( [id] => 5245177 [patent_doc_number] => 20070241411 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-18 [patent_title] => 'STRUCTURES AND METHODS FOR FORMING SRAM CELLS WITH SELF-ALIGNED CONTACTS' [patent_app_type] => utility [patent_app_number] => 11/279413 [patent_app_country] => US [patent_app_date] => 2006-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 6160 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0241/20070241411.pdf [firstpage_image] =>[orig_patent_app_number] => 11279413 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/279413
STRUCTURES AND METHODS FOR FORMING SRAM CELLS WITH SELF-ALIGNED CONTACTS Apr 11, 2006 Abandoned
Array ( [id] => 876096 [patent_doc_number] => 07358144 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-15 [patent_title] => 'Method for fabricating semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/279164 [patent_app_country] => US [patent_app_date] => 2006-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 2526 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/358/07358144.pdf [firstpage_image] =>[orig_patent_app_number] => 11279164 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/279164
Method for fabricating semiconductor device Apr 9, 2006 Issued
Array ( [id] => 5123536 [patent_doc_number] => 20070235806 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-11 [patent_title] => 'INTEGRATED CIRCUIT CHIP WITH FETS HAVING MIXED BODY THICKNESSES AND METHOD OF MANUFACTURE THEREOF' [patent_app_type] => utility [patent_app_number] => 11/279063 [patent_app_country] => US [patent_app_date] => 2006-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3401 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0235/20070235806.pdf [firstpage_image] =>[orig_patent_app_number] => 11279063 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/279063
Integrated circuit chip with FETs having mixed body thicknesses and method of manufacture thereof Apr 6, 2006 Issued
Array ( [id] => 5123546 [patent_doc_number] => 20070235816 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-11 [patent_title] => 'Single Poly BiCMOS Flash Cell With Floating Body' [patent_app_type] => utility [patent_app_number] => 11/278753 [patent_app_country] => US [patent_app_date] => 2006-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4572 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0235/20070235816.pdf [firstpage_image] =>[orig_patent_app_number] => 11278753 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/278753
Single poly BiCMOS flash cell with floating body Apr 4, 2006 Issued
Array ( [id] => 907009 [patent_doc_number] => 07332371 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-02-19 [patent_title] => 'Semiconductor device and method of manufacture thereof, circuit board and electronic instrument' [patent_app_type] => utility [patent_app_number] => 11/391559 [patent_app_country] => US [patent_app_date] => 2006-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 5723 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/332/07332371.pdf [firstpage_image] =>[orig_patent_app_number] => 11391559 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/391559
Semiconductor device and method of manufacture thereof, circuit board and electronic instrument Mar 28, 2006 Issued
Array ( [id] => 5664754 [patent_doc_number] => 20060170104 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-03 [patent_title] => 'METHOD AND STRUCTURE FOR DEFECT MONITORING OF SEMICONDUCTOR DEVICES USING POWER BUS WIRING GRIDS' [patent_app_type] => utility [patent_app_number] => 11/277663 [patent_app_country] => US [patent_app_date] => 2006-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2881 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0170/20060170104.pdf [firstpage_image] =>[orig_patent_app_number] => 11277663 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/277663
Method and structure for defect monitoring of semiconductor devices using power bus wiring grids Mar 27, 2006 Issued
Array ( [id] => 5851224 [patent_doc_number] => 20060234415 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-19 [patent_title] => 'Solid state imaging apparatus and driving method of solid state imaging apparatus' [patent_app_type] => utility [patent_app_number] => 11/389177 [patent_app_country] => US [patent_app_date] => 2006-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 6950 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0234/20060234415.pdf [firstpage_image] =>[orig_patent_app_number] => 11389177 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/389177
Solid state imaging apparatus and driving method of solid state imaging apparatus Mar 26, 2006 Issued
Array ( [id] => 411511 [patent_doc_number] => 07282391 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-10-16 [patent_title] => 'Method for precision assembly of integrated circuit chip packages' [patent_app_type] => utility [patent_app_number] => 11/385121 [patent_app_country] => US [patent_app_date] => 2006-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 27 [patent_no_of_words] => 4585 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/282/07282391.pdf [firstpage_image] =>[orig_patent_app_number] => 11385121 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/385121
Method for precision assembly of integrated circuit chip packages Mar 20, 2006 Issued
Array ( [id] => 576116 [patent_doc_number] => 07456043 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-11-25 [patent_title] => 'Method of fabricating microphone device and thermal oxide layer and low-stress structural layer thereof' [patent_app_type] => utility [patent_app_number] => 11/308283 [patent_app_country] => US [patent_app_date] => 2006-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 2170 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/456/07456043.pdf [firstpage_image] =>[orig_patent_app_number] => 11308283 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/308283
Method of fabricating microphone device and thermal oxide layer and low-stress structural layer thereof Mar 14, 2006 Issued
Array ( [id] => 326516 [patent_doc_number] => 07514287 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-04-07 [patent_title] => 'Method of forming a cavity by two-step etching and method of reducing dimension of a MEMS device' [patent_app_type] => utility [patent_app_number] => 11/308303 [patent_app_country] => US [patent_app_date] => 2006-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1504 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/514/07514287.pdf [firstpage_image] =>[orig_patent_app_number] => 11308303 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/308303
Method of forming a cavity by two-step etching and method of reducing dimension of a MEMS device Mar 14, 2006 Issued
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