Search

Lalrinfamkim Hmar Malsawma

Examiner (ID: 5479)

Most Active Art Unit
2892
Art Unit(s)
2825, 2892, 2823
Total Applications
2001
Issued Applications
1735
Pending Applications
112
Abandoned Applications
179

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 353018 [patent_doc_number] => 07492043 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-02-17 [patent_title] => 'Power module flip chip package' [patent_app_type] => utility [patent_app_number] => 10/927424 [patent_app_country] => US [patent_app_date] => 2004-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 2723 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/492/07492043.pdf [firstpage_image] =>[orig_patent_app_number] => 10927424 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/927424
Power module flip chip package Aug 25, 2004 Issued
Array ( [id] => 521506 [patent_doc_number] => 07186606 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-03-06 [patent_title] => 'Method of forming an integrated circuit employable with a power converter' [patent_app_type] => utility [patent_app_number] => 10/924094 [patent_app_country] => US [patent_app_date] => 2004-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 14855 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/186/07186606.pdf [firstpage_image] =>[orig_patent_app_number] => 10924094 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/924094
Method of forming an integrated circuit employable with a power converter Aug 22, 2004 Issued
Array ( [id] => 754337 [patent_doc_number] => 07018904 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-03-28 [patent_title] => 'Semiconductor chip having multiple functional blocks integrated in a single chip and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 10/921273 [patent_app_country] => US [patent_app_date] => 2004-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 39 [patent_no_of_words] => 13248 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/018/07018904.pdf [firstpage_image] =>[orig_patent_app_number] => 10921273 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/921273
Semiconductor chip having multiple functional blocks integrated in a single chip and method for fabricating the same Aug 18, 2004 Issued
10/920764 Integrated circuit with increased heat transfer Aug 17, 2004 Abandoned
Array ( [id] => 7169192 [patent_doc_number] => 20050121765 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-09 [patent_title] => 'Multi-chips bumpless assembly package and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 10/920383 [patent_app_country] => US [patent_app_date] => 2004-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2910 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0121/20050121765.pdf [firstpage_image] =>[orig_patent_app_number] => 10920383 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/920383
Multi-chips bumpless assembly package and manufacturing method thereof Aug 17, 2004 Issued
Array ( [id] => 547891 [patent_doc_number] => 07166924 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-01-23 [patent_title] => 'Electronic packages with dice landed on wire bonds' [patent_app_type] => utility [patent_app_number] => 10/921014 [patent_app_country] => US [patent_app_date] => 2004-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 6323 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/166/07166924.pdf [firstpage_image] =>[orig_patent_app_number] => 10921014 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/921014
Electronic packages with dice landed on wire bonds Aug 16, 2004 Issued
Array ( [id] => 5588814 [patent_doc_number] => 20060038265 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-23 [patent_title] => 'MULTI-PATH BAR BOND CONNECTOR FOR AN INTEGRATED CIRCUIT ASSEMBLY' [patent_app_type] => utility [patent_app_number] => 10/919864 [patent_app_country] => US [patent_app_date] => 2004-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2133 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0038/20060038265.pdf [firstpage_image] =>[orig_patent_app_number] => 10919864 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/919864
Multi-path bar bond connector for an integrated circuit assembly Aug 16, 2004 Issued
Array ( [id] => 6918306 [patent_doc_number] => 20050095867 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-05 [patent_title] => 'Method of manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/918114 [patent_app_country] => US [patent_app_date] => 2004-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6946 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0095/20050095867.pdf [firstpage_image] =>[orig_patent_app_number] => 10918114 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/918114
Method of manufacturing semiconductor device Aug 11, 2004 Abandoned
Array ( [id] => 712329 [patent_doc_number] => 07057284 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-06 [patent_title] => 'Fine pitch low-cost flip chip substrate' [patent_app_type] => utility [patent_app_number] => 10/916743 [patent_app_country] => US [patent_app_date] => 2004-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2491 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/057/07057284.pdf [firstpage_image] =>[orig_patent_app_number] => 10916743 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/916743
Fine pitch low-cost flip chip substrate Aug 11, 2004 Issued
Array ( [id] => 7080647 [patent_doc_number] => 20050046027 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-03 [patent_title] => 'Semiconductor device having a capping layer including cobalt and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 10/916303 [patent_app_country] => US [patent_app_date] => 2004-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3335 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0046/20050046027.pdf [firstpage_image] =>[orig_patent_app_number] => 10916303 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/916303
Semiconductor device having a capping layer including cobalt and method of fabricating the same Aug 9, 2004 Issued
Array ( [id] => 5796542 [patent_doc_number] => 20060033219 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-16 [patent_title] => 'Low profile, chip-scale package and method of fabrication' [patent_app_type] => utility [patent_app_number] => 10/916194 [patent_app_country] => US [patent_app_date] => 2004-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4015 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20060033219.pdf [firstpage_image] =>[orig_patent_app_number] => 10916194 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/916194
Low profile, chip-scale package and method of fabrication Aug 9, 2004 Issued
Array ( [id] => 526310 [patent_doc_number] => 07187076 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-03-06 [patent_title] => 'Interposer with integral heat sink' [patent_app_type] => utility [patent_app_number] => 10/913743 [patent_app_country] => US [patent_app_date] => 2004-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 4028 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/187/07187076.pdf [firstpage_image] =>[orig_patent_app_number] => 10913743 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/913743
Interposer with integral heat sink Aug 5, 2004 Issued
Array ( [id] => 5878126 [patent_doc_number] => 20060027906 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-09 [patent_title] => 'Exclusive memory structure applicable for multi media card and secure digital card' [patent_app_type] => utility [patent_app_number] => 10/911343 [patent_app_country] => US [patent_app_date] => 2004-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 603 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20060027906.pdf [firstpage_image] =>[orig_patent_app_number] => 10911343 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/911343
Exclusive memory structure applicable for multi media card and secure digital card Aug 2, 2004 Abandoned
Array ( [id] => 7148005 [patent_doc_number] => 20050023679 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-03 [patent_title] => 'Substrate with reinforced contact pad structure' [patent_app_type] => utility [patent_app_number] => 10/902003 [patent_app_country] => US [patent_app_date] => 2004-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1952 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0023/20050023679.pdf [firstpage_image] =>[orig_patent_app_number] => 10902003 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/902003
Substrate with reinforced contact pad structure Jul 29, 2004 Issued
Array ( [id] => 491540 [patent_doc_number] => 07215014 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-05-08 [patent_title] => 'Solderable metal finish for integrated circuit package leads and method for forming' [patent_app_type] => utility [patent_app_number] => 10/901844 [patent_app_country] => US [patent_app_date] => 2004-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 3075 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/215/07215014.pdf [firstpage_image] =>[orig_patent_app_number] => 10901844 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/901844
Solderable metal finish for integrated circuit package leads and method for forming Jul 28, 2004 Issued
Array ( [id] => 500292 [patent_doc_number] => 07205216 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-17 [patent_title] => 'Modification of electrical properties for semiconductor wafers' [patent_app_type] => utility [patent_app_number] => 10/710700 [patent_app_country] => US [patent_app_date] => 2004-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 3837 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/205/07205216.pdf [firstpage_image] =>[orig_patent_app_number] => 10710700 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/710700
Modification of electrical properties for semiconductor wafers Jul 28, 2004 Issued
Array ( [id] => 7022918 [patent_doc_number] => 20050017312 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-27 [patent_title] => 'Barrier in gate stack for improved gate dielectric integrity' [patent_app_type] => utility [patent_app_number] => 10/901552 [patent_app_country] => US [patent_app_date] => 2004-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3667 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0017/20050017312.pdf [firstpage_image] =>[orig_patent_app_number] => 10901552 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/901552
Barrier in gate stack for improved gate dielectric integrity Jul 26, 2004 Issued
Array ( [id] => 7429054 [patent_doc_number] => 20040266048 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-30 [patent_title] => 'Bonding for a micro-electro-mechanical system (MEMS) and MEMS based devices' [patent_app_type] => new [patent_app_number] => 10/899474 [patent_app_country] => US [patent_app_date] => 2004-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9368 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0266/20040266048.pdf [firstpage_image] =>[orig_patent_app_number] => 10899474 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/899474
Bonding for a micro-electro-mechanical system (MEMS) and MEMS based devices Jul 25, 2004 Issued
Array ( [id] => 7022980 [patent_doc_number] => 20050017374 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-27 [patent_title] => 'Semiconductor component of semiconductor chip size with flip-chip-like external contacts, and method of producing the same' [patent_app_type] => utility [patent_app_number] => 10/896993 [patent_app_country] => US [patent_app_date] => 2004-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5716 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0017/20050017374.pdf [firstpage_image] =>[orig_patent_app_number] => 10896993 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/896993
Semiconductor component of semiconductor chip size with flip-chip-like external contacts, and method of producing the same Jul 22, 2004 Issued
Array ( [id] => 457729 [patent_doc_number] => 07245023 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-07-17 [patent_title] => 'Semiconductor chip assembly with solder-attached ground plane' [patent_app_type] => utility [patent_app_number] => 10/894593 [patent_app_country] => US [patent_app_date] => 2004-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 182 [patent_no_of_words] => 32713 [patent_no_of_claims] => 230 [patent_no_of_ind_claims] => 37 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/245/07245023.pdf [firstpage_image] =>[orig_patent_app_number] => 10894593 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/894593
Semiconductor chip assembly with solder-attached ground plane Jul 19, 2004 Issued
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