
Lalrinfamkim Hmar Malsawma
Examiner (ID: 5479)
| Most Active Art Unit | 2892 |
| Art Unit(s) | 2825, 2892, 2823 |
| Total Applications | 2001 |
| Issued Applications | 1735 |
| Pending Applications | 112 |
| Abandoned Applications | 179 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6745306
[patent_doc_number] => 20030022489
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-01-30
[patent_title] => 'Method of fabricating high melting point metal wiring layer, method of fabricating semiconductor device and semiconductor device'
[patent_app_type] => new
[patent_app_number] => 10/139380
[patent_app_country] => US
[patent_app_date] => 2002-05-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 1952
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 39
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0022/20030022489.pdf
[firstpage_image] =>[orig_patent_app_number] => 10139380
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/139380 | Method of fabricating high melting point metal wiring layer, method of fabricating semiconductor device and semiconductor device | May 6, 2002 | Abandoned |
Array
(
[id] => 6745341
[patent_doc_number] => 20030022524
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-01-30
[patent_title] => 'Low volatility solvent-based method for forming thin film nanoporous aerogels on semiconductor substrates'
[patent_app_type] => new
[patent_app_number] => 10/135212
[patent_app_country] => US
[patent_app_date] => 2002-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 18276
[patent_no_of_claims] => 47
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0022/20030022524.pdf
[firstpage_image] =>[orig_patent_app_number] => 10135212
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/135212 | Low volatility solvent-based method for forming thin film nanoporous aerogels on semiconductor substrates | Apr 29, 2002 | Issued |
Array
(
[id] => 6170208
[patent_doc_number] => 20020153579
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-10-24
[patent_title] => 'Semiconductor device with thin film having high permittivity and uniform thickness'
[patent_app_type] => new
[patent_app_number] => 10/125370
[patent_app_country] => US
[patent_app_date] => 2002-04-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 10564
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 67
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0153/20020153579.pdf
[firstpage_image] =>[orig_patent_app_number] => 10125370
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/125370 | Semiconductor device with thin film having high permittivity and uniform thickness | Apr 18, 2002 | Abandoned |
Array
(
[id] => 1159839
[patent_doc_number] => 06762500
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-07-13
[patent_title] => 'Barrier-metal-free copper damascene technology using atomic hydrogen enhanced reflow'
[patent_app_type] => B2
[patent_app_number] => 10/122870
[patent_app_country] => US
[patent_app_date] => 2002-04-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 4443
[patent_no_of_claims] => 94
[patent_no_of_ind_claims] => 66
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/762/06762500.pdf
[firstpage_image] =>[orig_patent_app_number] => 10122870
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/122870 | Barrier-metal-free copper damascene technology using atomic hydrogen enhanced reflow | Apr 14, 2002 | Issued |
Array
(
[id] => 951618
[patent_doc_number] => 06960823
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-11-01
[patent_title] => 'Semiconductor device and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 10/114940
[patent_app_country] => US
[patent_app_date] => 2002-04-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 33
[patent_no_of_words] => 11974
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 200
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/960/06960823.pdf
[firstpage_image] =>[orig_patent_app_number] => 10114940
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/114940 | Semiconductor device and method of manufacturing the same | Apr 3, 2002 | Issued |
Array
(
[id] => 1318256
[patent_doc_number] => 06605498
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-08-12
[patent_title] => 'Semiconductor transistor having a backfilled channel material'
[patent_app_type] => B1
[patent_app_number] => 10/112170
[patent_app_country] => US
[patent_app_date] => 2002-03-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 2163
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 89
[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/605/06605498.pdf
[firstpage_image] =>[orig_patent_app_number] => 10112170
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/112170 | Semiconductor transistor having a backfilled channel material | Mar 28, 2002 | Issued |
Array
(
[id] => 6696923
[patent_doc_number] => 20030109117
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-06-12
[patent_title] => 'Semiconductor device and manufacturing method thereof'
[patent_app_type] => new
[patent_app_number] => 10/103040
[patent_app_country] => US
[patent_app_date] => 2002-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 61
[patent_figures_cnt] => 61
[patent_no_of_words] => 20008
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0109/20030109117.pdf
[firstpage_image] =>[orig_patent_app_number] => 10103040
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/103040 | Semiconductor device and manufacturing method thereof | Mar 21, 2002 | Abandoned |
Array
(
[id] => 6016372
[patent_doc_number] => 20020102778
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-08-01
[patent_title] => 'Dynamic random access memory (DRAM) cell with a folded bitline vertical transistor and method of producing the same'
[patent_app_type] => new
[patent_app_number] => 10/101992
[patent_app_country] => US
[patent_app_date] => 2002-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 5196
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 47
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0102/20020102778.pdf
[firstpage_image] =>[orig_patent_app_number] => 10101992
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/101992 | Dynamic random access memory (DRAM) cell with folded bitline vertical transistor and method of producing the same | Mar 20, 2002 | Issued |
Array
(
[id] => 6437038
[patent_doc_number] => 20020148307
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-10-17
[patent_title] => 'Inspection system for process devices for treating substrates, sensor intended for such inspection system, and method for inspecting process devices'
[patent_app_type] => new
[patent_app_number] => 10/099870
[patent_app_country] => US
[patent_app_date] => 2002-03-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2704
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 17
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0148/20020148307.pdf
[firstpage_image] =>[orig_patent_app_number] => 10099870
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/099870 | Inspection system for process devices for treating substrates, sensor intended for such inspection system, and method for inspecting process devices | Mar 13, 2002 | Issued |
Array
(
[id] => 5906585
[patent_doc_number] => 20020142506
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-10-03
[patent_title] => 'Surface emission type semiconductor light-emitting device and method of manufacturing the same'
[patent_app_type] => new
[patent_app_number] => 10/095570
[patent_app_country] => US
[patent_app_date] => 2002-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6202
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0142/20020142506.pdf
[firstpage_image] =>[orig_patent_app_number] => 10095570
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/095570 | Surface emission type semiconductor light-emitting device and method of manufacturing the same | Mar 12, 2002 | Issued |
Array
(
[id] => 6297223
[patent_doc_number] => 20020092157
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-07-18
[patent_title] => 'Method and apparatus for mounting component'
[patent_app_type] => new
[patent_app_number] => 10/083567
[patent_app_country] => US
[patent_app_date] => 2002-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 14727
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0092/20020092157.pdf
[firstpage_image] =>[orig_patent_app_number] => 10083567
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/083567 | Method and apparatus for mounting component | Feb 26, 2002 | Abandoned |
Array
(
[id] => 770210
[patent_doc_number] => 07005718
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-02-28
[patent_title] => 'Scribe line planarization layer'
[patent_app_type] => utility
[patent_app_number] => 10/072216
[patent_app_country] => US
[patent_app_date] => 2002-02-05
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/07/005/07005718.pdf
[firstpage_image] =>[orig_patent_app_number] => 10072216
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/072216 | Scribe line planarization layer | Feb 4, 2002 | Issued |
Array
(
[id] => 1017400
[patent_doc_number] => 06895570
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-05-17
[patent_title] => 'System and method for optimizing routing lines in a programmable logic device'
[patent_app_type] => utility
[patent_app_number] => 10/057232
[patent_app_country] => US
[patent_app_date] => 2002-01-25
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[pdf_file] => patents/06/895/06895570.pdf
[firstpage_image] =>[orig_patent_app_number] => 10057232
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/057232 | System and method for optimizing routing lines in a programmable logic device | Jan 24, 2002 | Issued |
Array
(
[id] => 6761448
[patent_doc_number] => 20030124810
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-07-03
[patent_title] => 'Thick oxide P-gate NMOS capacitor for use in a phase-locked loop circuit and method of making same'
[patent_app_type] => new
[patent_app_number] => 10/026470
[patent_app_country] => US
[patent_app_date] => 2001-12-27
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0124/20030124810.pdf
[firstpage_image] =>[orig_patent_app_number] => 10026470
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/026470 | Thick oxide P-gate NMOS capacitor for use in a phase-locked loop circuit and method of making same | Dec 26, 2001 | Issued |
Array
(
[id] => 5844584
[patent_doc_number] => 20020132455
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-09-19
[patent_title] => 'Method for forming crystalline silicon layer and crystalline silicon semiconductor device'
[patent_app_type] => new
[patent_app_number] => 10/007670
[patent_app_country] => US
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[pdf_file] => publications/A1/0132/20020132455.pdf
[firstpage_image] =>[orig_patent_app_number] => 10007670
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/007670 | Method for forming crystalline silicon layer and crystalline silicon semiconductor device | Dec 9, 2001 | Issued |
Array
(
[id] => 7383682
[patent_doc_number] => 20040029374
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-02-12
[patent_title] => 'Compact semiconductor structure and method for producing the same'
[patent_app_type] => new
[patent_app_number] => 10/432770
[patent_app_country] => US
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[pdf_file] => publications/A1/0029/20040029374.pdf
[firstpage_image] =>[orig_patent_app_number] => 10432770
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/432770 | Compact semiconductor structure | Nov 27, 2001 | Issued |
Array
(
[id] => 1220568
[patent_doc_number] => 06703308
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-03-09
[patent_title] => 'Method of inserting alloy elements to reduce copper diffusion and bulk diffusion'
[patent_app_type] => B1
[patent_app_number] => 09/994400
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 09994400
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/994400 | Method of inserting alloy elements to reduce copper diffusion and bulk diffusion | Nov 25, 2001 | Issued |
Array
(
[id] => 6209387
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[patent_title] => 'Semiconductor device and method of fabrication thereof, circuit board, and electronic equipment'
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Array
(
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[patent_title] => 'Preventing plasma induced damage resulting from high density plasma deposition'
[patent_app_type] => new
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[pdf_file] => publications/A1/0092/20030092284.pdf
[firstpage_image] =>[orig_patent_app_number] => 10012290
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/012290 | Preventing plasma induced damage resulting from high density plasma deposition | Nov 12, 2001 | Issued |
Array
(
[id] => 6870203
[patent_doc_number] => 20030082892
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-05-01
[patent_title] => 'Method for reducing the drain coupling ratio of floating gate device'
[patent_app_type] => new
[patent_app_number] => 09/984900
[patent_app_country] => US
[patent_app_date] => 2001-10-31
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0082/20030082892.pdf
[firstpage_image] =>[orig_patent_app_number] => 09984900
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/984900 | Method for reducing the drain coupling ratio of floating gate device | Oct 30, 2001 | Abandoned |