
Lalrinfamkim Hmar Malsawma
Examiner (ID: 5479)
| Most Active Art Unit | 2892 |
| Art Unit(s) | 2825, 2892, 2823 |
| Total Applications | 2001 |
| Issued Applications | 1735 |
| Pending Applications | 112 |
| Abandoned Applications | 179 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1202626
[patent_doc_number] => 06720200
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-04-13
[patent_title] => 'Field effect transistor and fabrication process thereof'
[patent_app_type] => B2
[patent_app_number] => 09/862870
[patent_app_country] => US
[patent_app_date] => 2001-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 45
[patent_no_of_words] => 8623
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/720/06720200.pdf
[firstpage_image] =>[orig_patent_app_number] => 09862870
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/862870 | Field effect transistor and fabrication process thereof | May 21, 2001 | Issued |
Array
(
[id] => 1449995
[patent_doc_number] => 06455390
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2002-09-24
[patent_title] => 'Method of manufacturing hetero-junction bipolar transistor'
[patent_app_type] => B2
[patent_app_number] => 09/861614
[patent_app_country] => US
[patent_app_date] => 2001-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[patent_no_of_words] => 6266
[patent_no_of_claims] => 26
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[patent_words_short_claim] => 119
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/455/06455390.pdf
[firstpage_image] =>[orig_patent_app_number] => 09861614
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/861614 | Method of manufacturing hetero-junction bipolar transistor | May 21, 2001 | Issued |
Array
(
[id] => 1440084
[patent_doc_number] => 06495440
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2002-12-17
[patent_title] => 'Method to prevent an ITO from opening'
[patent_app_type] => B2
[patent_app_number] => 09/846300
[patent_app_country] => US
[patent_app_date] => 2001-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[pdf_file] => patents/06/495/06495440.pdf
[firstpage_image] =>[orig_patent_app_number] => 09846300
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/846300 | Method to prevent an ITO from opening | May 1, 2001 | Issued |
Array
(
[id] => 6176769
[patent_doc_number] => 20020155686
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-10-24
[patent_title] => 'Fabrication method for suppressing a hot carrier effect and leakage currents of I/O devices'
[patent_app_type] => new
[patent_app_number] => 09/840710
[patent_app_country] => US
[patent_app_date] => 2001-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 2260
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0155/20020155686.pdf
[firstpage_image] =>[orig_patent_app_number] => 09840710
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/840710 | Fabrication method for suppressing a hot carrier effect and leakage currents of I/O devices | Apr 23, 2001 | Abandoned |
Array
(
[id] => 1270265
[patent_doc_number] => 06653216
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-11-25
[patent_title] => 'Transparent electrode forming apparatus and method of fabricating active matrix substrate'
[patent_app_type] => B1
[patent_app_number] => 09/840220
[patent_app_country] => US
[patent_app_date] => 2001-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
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[patent_no_of_words] => 11675
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[pdf_file] => patents/06/653/06653216.pdf
[firstpage_image] =>[orig_patent_app_number] => 09840220
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/840220 | Transparent electrode forming apparatus and method of fabricating active matrix substrate | Apr 22, 2001 | Issued |
Array
(
[id] => 6141766
[patent_doc_number] => 20020001911
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-01-03
[patent_title] => 'Method for fabricating avalanche photodiode'
[patent_app_type] => new
[patent_app_number] => 09/839930
[patent_app_country] => US
[patent_app_date] => 2001-04-20
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[pdf_file] => publications/A1/0001/20020001911.pdf
[firstpage_image] =>[orig_patent_app_number] => 09839930
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/839930 | Method for fabricating avalanche photodiode | Apr 19, 2001 | Issued |
Array
(
[id] => 6269391
[patent_doc_number] => 20020105003
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-08-08
[patent_title] => 'Light emitting diode and method of making the same'
[patent_app_type] => new
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[patent_app_country] => US
[patent_app_date] => 2001-04-06
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[pdf_file] => publications/A1/0105/20020105003.pdf
[firstpage_image] =>[orig_patent_app_number] => 09828060
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/828060 | Light emitting diode and method of making the same | Apr 5, 2001 | Issued |
Array
(
[id] => 1241127
[patent_doc_number] => 06682950
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-01-27
[patent_title] => 'Light emitting diode and method of making the same'
[patent_app_type] => B2
[patent_app_number] => 09/826490
[patent_app_country] => US
[patent_app_date] => 2001-04-05
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[pdf_file] => patents/06/682/06682950.pdf
[firstpage_image] =>[orig_patent_app_number] => 09826490
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/826490 | Light emitting diode and method of making the same | Apr 4, 2001 | Issued |
Array
(
[id] => 996547
[patent_doc_number] => 06913986
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-07-05
[patent_title] => 'Method and apparatus for fabricating a thin film and thin film transistor and method of fabricating same'
[patent_app_type] => utility
[patent_app_number] => 10/240570
[patent_app_country] => US
[patent_app_date] => 2001-04-04
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/913/06913986.pdf
[firstpage_image] =>[orig_patent_app_number] => 10240570
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/240570 | Method and apparatus for fabricating a thin film and thin film transistor and method of fabricating same | Apr 3, 2001 | Issued |
Array
(
[id] => 1595683
[patent_doc_number] => 06492255
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2002-12-10
[patent_title] => 'Semiconductor chip and method manufacturing the same'
[patent_app_type] => B2
[patent_app_number] => 09/821070
[patent_app_country] => US
[patent_app_date] => 2001-03-30
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[pdf_file] => patents/06/492/06492255.pdf
[firstpage_image] =>[orig_patent_app_number] => 09821070
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/821070 | Semiconductor chip and method manufacturing the same | Mar 29, 2001 | Issued |
Array
(
[id] => 5906744
[patent_doc_number] => 20020142539
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-10-03
[patent_title] => 'Self-aligned method for fabricating a capacitor under bit-line (cub) dynamic random access memory (DRAM) cell structure'
[patent_app_type] => new
[patent_app_number] => 09/820390
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 09820390
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/820390 | Self-aligned method for fabricating a capacitor under bit-line (cub) dynamic random access memory (DRAM) cell structure | Mar 27, 2001 | Issued |
Array
(
[id] => 5906619
[patent_doc_number] => 20020142514
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-10-03
[patent_title] => 'Microelectronic assembly with die support and method'
[patent_app_type] => new
[patent_app_number] => 09/819393
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[firstpage_image] =>[orig_patent_app_number] => 09819393
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/819393 | Microelectronic assembly with die support and method | Mar 27, 2001 | Issued |
Array
(
[id] => 6907605
[patent_doc_number] => 20010010372
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-08-02
[patent_title] => 'Method of fabricating a group III-V semiconductor light emitting device with reduced piezoelectric fields and increased efficiency'
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[patent_app_number] => 09/813570
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/813570 | Method of fabricating a group III-V semiconductor light emitting device with reduced piezoelectric fields and increased efficiency | Mar 19, 2001 | Abandoned |
Array
(
[id] => 5844621
[patent_doc_number] => 20020132474
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[patent_issue_date] => 2002-09-19
[patent_title] => 'Barrier-metal-free copper damascene technology using atomic hydrogen enhanced reflow'
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Array
(
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[patent_title] => 'Method for fabricating a MOS transistor of an embedded memory'
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Array
(
[id] => 1401570
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[patent_issue_date] => 2003-03-18
[patent_title] => 'High voltage oxidation method for highly reliable flash memory devices'
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[patent_app_number] => 09/803400
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/803400 | High voltage oxidation method for highly reliable flash memory devices | Mar 11, 2001 | Issued |
Array
(
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[patent_issue_date] => 2002-11-26
[patent_title] => 'Method for and device having STI using partial etch trench bottom liner'
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Array
(
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Array
(
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[patent_title] => 'Non-volatile memory with improved programming and method therefor'
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Array
(
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[patent_issue_date] => 2002-05-16
[patent_title] => 'Method of fabricating a dummy gate electrode of an ESD protecting device'
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[patent_app_number] => 09/790800
[patent_app_country] => US
[patent_app_date] => 2001-02-23
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/790800 | Method of fabricating a dummy gate electrode of an ESD protecting device | Feb 22, 2001 | Abandoned |