Lalrinfamkim Hmar Malsawma

Array ( [id] => 6891646 [patent_doc_number] => 20010017808 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-30 [patent_title] => 'Non-volatile memory cell having bilayered floating gate and fabricating method thereof' [patent_app_type] => new [patent_app_number] => 09/791910 [patent_app_country] => US [patent_app_date] => 2001-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3963 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0017/20010017808.pdf [firstpage_image] =>[orig_patent_app_number] => 09791910 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6900101 [patent_doc_number] => 20010009777 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-07-26 [patent_title] => 'Method of etching a wafer layer using a sacrificial wall and structure formed thereby' [patent_app_type] => new [patent_app_number] => 09/788821 [patent_app_country] => US [patent_app_date] => 2001-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3520 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0009/20010009777.pdf [firstpage_image] =>[orig_patent_app_number] => 09788821 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6893132 [patent_doc_number] => 20010015498 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-23 [patent_title] => 'Semiconductor device and method of fabricating the same' [patent_app_type] => new [patent_app_number] => 09/785180 [patent_app_country] => US [patent_app_date] => 2001-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3250 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0015/20010015498.pdf [firstpage_image] =>[orig_patent_app_number] => 09785180 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6891220 [patent_doc_number] => 20010017382 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-30 [patent_title] => 'Optimized low leakage diodes, including photodiodes' [patent_app_type] => new [patent_app_number] => 09/780390 [patent_app_country] => US [patent_app_date] => 2001-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4131 [patent_no_of_claims] => 105 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0017/20010017382.pdf [firstpage_image] =>[orig_patent_app_number] => 09780390 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 588919 [patent_doc_number] => 07435613 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-14 [patent_title] => 'Methods of fabricating a membrane with improved mechanical integrity' [patent_app_type] => utility [patent_app_number] => 09/781820 [patent_app_country] => US [patent_app_date] => 2001-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 33 [patent_no_of_words] => 4334 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/435/07435613.pdf [firstpage_image] =>[orig_patent_app_number] => 09781820 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6934476 [patent_doc_number] => 20010055820 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-12-27 [patent_title] => 'Ferroelectric thin film device and method of producing the same' [patent_app_type] => new [patent_app_number] => 09/773987 [patent_app_country] => US [patent_app_date] => 2001-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6134 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0055/20010055820.pdf [firstpage_image] =>[orig_patent_app_number] => 09773987 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1318320 [patent_doc_number] => 06605506 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-08-12 [patent_title] => 'Method of fabricating a scalable stacked-gate flash memory device and its high-density memory arrays' [patent_app_type] => B2 [patent_app_number] => 09/771731 [patent_app_country] => US [patent_app_date] => 2001-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 23 [patent_no_of_words] => 5791 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 416 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/605/06605506.pdf [firstpage_image] =>[orig_patent_app_number] => 09771731 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6861228 [patent_doc_number] => 20030092236 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-15 [patent_title] => 'Flash memory cell and method to achieve multiple bits per cell' [patent_app_type] => new [patent_app_number] => 09/772220 [patent_app_country] => US [patent_app_date] => 2001-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2728 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0092/20030092236.pdf [firstpage_image] =>[orig_patent_app_number] => 09772220 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1414599 [patent_doc_number] => 06521519 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-02-18 [patent_title] => 'MIS transistor and manufacturing method thereof' [patent_app_type] => B2 [patent_app_number] => 09/769400 [patent_app_country] => US [patent_app_date] => 2001-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 3117 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/521/06521519.pdf [firstpage_image] =>[orig_patent_app_number] => 09769400 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1466891 [patent_doc_number] => 06458616 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-10-01 [patent_title] => 'Method for manufacturing a semiconductor material integrated microactuator, in particular for a hard disc mobile read/write head, and a microactuator obtained thereby' [patent_app_type] => B2 [patent_app_number] => 09/768777 [patent_app_country] => US [patent_app_date] => 2001-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 3443 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/458/06458616.pdf [firstpage_image] =>[orig_patent_app_number] => 09768777 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7040533 [patent_doc_number] => 20010005333 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-06-28 [patent_title] => 'Non-volatile memory structure and corresponding manufacturing process' [patent_app_type] => new-utility [patent_app_number] => 09/761330 [patent_app_country] => US [patent_app_date] => 2001-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3511 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 21 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0005/20010005333.pdf [firstpage_image] =>[orig_patent_app_number] => 09761330 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6300378 [patent_doc_number] => 20020093031 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-18 [patent_title] => 'Heterojunction bipolar transistor' [patent_app_type] => new [patent_app_number] => 09/759120 [patent_app_country] => US [patent_app_date] => 2001-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5111 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0093/20020093031.pdf [firstpage_image] =>[orig_patent_app_number] => 09759120 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1522245 [patent_doc_number] => 06414351 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-07-02 [patent_title] => 'Mini FLASH process and circuit' [patent_app_type] => B2 [patent_app_number] => 09/757520 [patent_app_country] => US [patent_app_date] => 2001-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 24 [patent_no_of_words] => 7197 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 274 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/414/06414351.pdf [firstpage_image] =>[orig_patent_app_number] => 09757520 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1381666 [patent_doc_number] => 06551878 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-04-22 [patent_title] => 'Mini flash process and circuit' [patent_app_type] => B2 [patent_app_number] => 09/757878 [patent_app_country] => US [patent_app_date] => 2001-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 24 [patent_no_of_words] => 7195 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 16 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/551/06551878.pdf [firstpage_image] =>[orig_patent_app_number] => 09757878 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7051838 [patent_doc_number] => 20010001210 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-05-17 [patent_title] => 'Capacitor Structures' [patent_app_type] => new-utility [patent_app_number] => 09/754924 [patent_app_country] => US [patent_app_date] => 2001-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1983 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 16 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20010001210.pdf [firstpage_image] =>[orig_patent_app_number] => 09754924 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1273964 [patent_doc_number] => 06649501 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-11-18 [patent_title] => 'Method for forming a bit line for a semiconductor device' [patent_app_type] => B2 [patent_app_number] => 09/751940 [patent_app_country] => US [patent_app_date] => 2001-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 1531 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/649/06649501.pdf [firstpage_image] =>[orig_patent_app_number] => 09751940 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1209348 [patent_doc_number] => 06713374 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-03-30 [patent_title] => 'Interconnect assemblies and methods' [patent_app_type] => B2 [patent_app_number] => 09/752640 [patent_app_country] => US [patent_app_date] => 2000-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 36 [patent_no_of_words] => 10416 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/713/06713374.pdf [firstpage_image] =>[orig_patent_app_number] => 09752640 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1378896 [patent_doc_number] => 06555432 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-04-29 [patent_title] => 'Integrated capacitor bottom electrode for use with conformal dielectric' [patent_app_type] => B2 [patent_app_number] => 09/733820 [patent_app_country] => US [patent_app_date] => 2000-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 4257 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/555/06555432.pdf [firstpage_image] =>[orig_patent_app_number] => 09733820 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1300004 [patent_doc_number] => 06627938 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-09-30 [patent_title] => 'Capacitor constructions' [patent_app_type] => B2 [patent_app_number] => 09/729130 [patent_app_country] => US [patent_app_date] => 2000-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 2963 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/627/06627938.pdf [firstpage_image] =>[orig_patent_app_number] => 09729130 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7645261 [patent_doc_number] => 06472711 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-29 [patent_title] => 'Semiconductor substrate and production method thereof' [patent_app_type] => B1 [patent_app_number] => 09/716429 [patent_app_country] => US [patent_app_date] => 2000-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 47 [patent_no_of_words] => 11468 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/472/06472711.pdf [firstpage_image] =>[orig_patent_app_number] => 09716429 [rel_patent_id] =>[rel_patent_doc_number] =>)