Search

Lalrinfamkim Hmar Malsawma

Examiner (ID: 5479)

Most Active Art Unit
2892
Art Unit(s)
2825, 2892, 2823
Total Applications
2001
Issued Applications
1735
Pending Applications
112
Abandoned Applications
179

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1299686 [patent_doc_number] => 06624047 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-23 [patent_title] => 'Substrate and method of manufacturing the same' [patent_app_type] => B1 [patent_app_number] => 09/496130 [patent_app_country] => US [patent_app_date] => 2000-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 35 [patent_no_of_words] => 19684 [patent_no_of_claims] => 64 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/624/06624047.pdf [firstpage_image] =>[orig_patent_app_number] => 09496130 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/496130
Substrate and method of manufacturing the same Jan 31, 2000 Issued
Array ( [id] => 4350792 [patent_doc_number] => 06291330 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-18 [patent_title] => 'Method of fabricating gate structure to reduce stress production' [patent_app_type] => 1 [patent_app_number] => 9/494521 [patent_app_country] => US [patent_app_date] => 2000-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 2374 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/291/06291330.pdf [firstpage_image] =>[orig_patent_app_number] => 494521 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/494521
Method of fabricating gate structure to reduce stress production Jan 30, 2000 Issued
Array ( [id] => 1520740 [patent_doc_number] => 06413863 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-02 [patent_title] => 'Method to resolve the passivation surface roughness during formation of the AlCu pad for the copper process' [patent_app_type] => B1 [patent_app_number] => 09/489971 [patent_app_country] => US [patent_app_date] => 2000-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 3730 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/413/06413863.pdf [firstpage_image] =>[orig_patent_app_number] => 09489971 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/489971
Method to resolve the passivation surface roughness during formation of the AlCu pad for the copper process Jan 23, 2000 Issued
Array ( [id] => 4381769 [patent_doc_number] => 06277744 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-21 [patent_title] => 'Two-level silane nucleation for blanket tungsten deposition' [patent_app_type] => 1 [patent_app_number] => 9/489510 [patent_app_country] => US [patent_app_date] => 2000-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 4236 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/277/06277744.pdf [firstpage_image] =>[orig_patent_app_number] => 489510 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/489510
Two-level silane nucleation for blanket tungsten deposition Jan 20, 2000 Issued
Array ( [id] => 4326563 [patent_doc_number] => 06319769 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-20 [patent_title] => 'Capacitor in a semiconductor device and a fabricating method thereof' [patent_app_type] => 1 [patent_app_number] => 9/487796 [patent_app_country] => US [patent_app_date] => 2000-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4013 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/319/06319769.pdf [firstpage_image] =>[orig_patent_app_number] => 487796 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/487796
Capacitor in a semiconductor device and a fabricating method thereof Jan 19, 2000 Issued
Array ( [id] => 4405521 [patent_doc_number] => 06232192 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-15 [patent_title] => 'Method of manufacturing semiconductor device having sidewall portions removed' [patent_app_type] => 1 [patent_app_number] => 9/484410 [patent_app_country] => US [patent_app_date] => 2000-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 28 [patent_no_of_words] => 6164 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/232/06232192.pdf [firstpage_image] =>[orig_patent_app_number] => 484410 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/484410
Method of manufacturing semiconductor device having sidewall portions removed Jan 17, 2000 Issued
Array ( [id] => 4359099 [patent_doc_number] => 06169015 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-02 [patent_title] => 'Method and apparatus for controlling the dosage of ions implanted into a semiconductor wafer' [patent_app_type] => 1 [patent_app_number] => 9/483220 [patent_app_country] => US [patent_app_date] => 2000-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 3273 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/169/06169015.pdf [firstpage_image] =>[orig_patent_app_number] => 483220 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/483220
Method and apparatus for controlling the dosage of ions implanted into a semiconductor wafer Jan 13, 2000 Issued
Array ( [id] => 4376968 [patent_doc_number] => 06303403 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-16 [patent_title] => 'Method for preparing gallium nitride phosphor' [patent_app_type] => 1 [patent_app_number] => 9/472011 [patent_app_country] => US [patent_app_date] => 1999-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4473 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/303/06303403.pdf [firstpage_image] =>[orig_patent_app_number] => 472011 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/472011
Method for preparing gallium nitride phosphor Dec 26, 1999 Issued
Array ( [id] => 4313184 [patent_doc_number] => 06242361 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-05 [patent_title] => 'Plasma treatment to improve DUV photoresist process' [patent_app_type] => 1 [patent_app_number] => 9/458730 [patent_app_country] => US [patent_app_date] => 1999-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 1557 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/242/06242361.pdf [firstpage_image] =>[orig_patent_app_number] => 458730 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/458730
Plasma treatment to improve DUV photoresist process Dec 12, 1999 Issued
Array ( [id] => 4347892 [patent_doc_number] => 06214680 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-10 [patent_title] => 'Method to fabricate a sub-quarter-micron MOSFET with lightly doped source/drain regions' [patent_app_type] => 1 [patent_app_number] => 9/460111 [patent_app_country] => US [patent_app_date] => 1999-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 2115 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 293 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/214/06214680.pdf [firstpage_image] =>[orig_patent_app_number] => 460111 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/460111
Method to fabricate a sub-quarter-micron MOSFET with lightly doped source/drain regions Dec 12, 1999 Issued
Array ( [id] => 4331832 [patent_doc_number] => 06329704 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-11 [patent_title] => 'Ultra-shallow junction dopant layer having a peak concentration within a dielectric layer' [patent_app_type] => 1 [patent_app_number] => 9/458530 [patent_app_country] => US [patent_app_date] => 1999-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3884 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/329/06329704.pdf [firstpage_image] =>[orig_patent_app_number] => 458530 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/458530
Ultra-shallow junction dopant layer having a peak concentration within a dielectric layer Dec 8, 1999 Issued
Array ( [id] => 1600145 [patent_doc_number] => 06475815 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-05 [patent_title] => 'Method of measuring temperature, method of taking samples for temperature measurement and method for fabricating semiconductor device' [patent_app_type] => B1 [patent_app_number] => 09/456381 [patent_app_country] => US [patent_app_date] => 1999-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 24 [patent_no_of_words] => 13721 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 19 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/475/06475815.pdf [firstpage_image] =>[orig_patent_app_number] => 09456381 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/456381
Method of measuring temperature, method of taking samples for temperature measurement and method for fabricating semiconductor device Dec 7, 1999 Issued
Array ( [id] => 4286979 [patent_doc_number] => 06268272 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-31 [patent_title] => 'Method of forming gate electrode with titanium polycide' [patent_app_type] => 1 [patent_app_number] => 9/456810 [patent_app_country] => US [patent_app_date] => 1999-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 15 [patent_no_of_words] => 2401 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/268/06268272.pdf [firstpage_image] =>[orig_patent_app_number] => 456810 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/456810
Method of forming gate electrode with titanium polycide Dec 7, 1999 Issued
Array ( [id] => 4380829 [patent_doc_number] => 06261884 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-17 [patent_title] => 'Method of fabricating and operating single polysilicon flash EEPROM with low positive programming and erasing voltage and small cell size' [patent_app_type] => 1 [patent_app_number] => 9/449541 [patent_app_country] => US [patent_app_date] => 1999-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 2264 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/261/06261884.pdf [firstpage_image] =>[orig_patent_app_number] => 449541 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/449541
Method of fabricating and operating single polysilicon flash EEPROM with low positive programming and erasing voltage and small cell size Nov 28, 1999 Issued
Array ( [id] => 4380793 [patent_doc_number] => 06277679 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-21 [patent_title] => 'Method of manufacturing thin film transistor' [patent_app_type] => 1 [patent_app_number] => 9/449140 [patent_app_country] => US [patent_app_date] => 1999-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 48 [patent_no_of_words] => 11774 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/277/06277679.pdf [firstpage_image] =>[orig_patent_app_number] => 449140 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/449140
Method of manufacturing thin film transistor Nov 23, 1999 Issued
Array ( [id] => 4422344 [patent_doc_number] => 06194739 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-27 [patent_title] => 'Inline ground-signal-ground (GSG) RF tester' [patent_app_type] => 1 [patent_app_number] => 9/448521 [patent_app_country] => US [patent_app_date] => 1999-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5970 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/194/06194739.pdf [firstpage_image] =>[orig_patent_app_number] => 448521 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/448521
Inline ground-signal-ground (GSG) RF tester Nov 22, 1999 Issued
Array ( [id] => 1455587 [patent_doc_number] => 06462425 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-08 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => B1 [patent_app_number] => 09/429635 [patent_app_country] => US [patent_app_date] => 1999-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 22 [patent_no_of_words] => 6152 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/462/06462425.pdf [firstpage_image] =>[orig_patent_app_number] => 09429635 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/429635
Semiconductor device and manufacturing method thereof Oct 28, 1999 Issued
Array ( [id] => 4387587 [patent_doc_number] => 06294831 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-25 [patent_title] => 'Electronic package with bonded structure and method of making' [patent_app_type] => 1 [patent_app_number] => 9/429154 [patent_app_country] => US [patent_app_date] => 1999-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 2915 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/294/06294831.pdf [firstpage_image] =>[orig_patent_app_number] => 429154 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/429154
Electronic package with bonded structure and method of making Oct 27, 1999 Issued
Array ( [id] => 1417731 [patent_doc_number] => 06514789 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-02-04 [patent_title] => 'Component and method for manufacture' [patent_app_type] => B2 [patent_app_number] => 09/427054 [patent_app_country] => US [patent_app_date] => 1999-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 1739 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/514/06514789.pdf [firstpage_image] =>[orig_patent_app_number] => 09427054 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/427054
Component and method for manufacture Oct 25, 1999 Issued
Array ( [id] => 1442036 [patent_doc_number] => 06335568 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-01 [patent_title] => 'Semiconductor device and method of fabrication thereof, circuit board, and electronic equipment' [patent_app_type] => B1 [patent_app_number] => 09/425966 [patent_app_country] => US [patent_app_date] => 1999-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 5340 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/335/06335568.pdf [firstpage_image] =>[orig_patent_app_number] => 09425966 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/425966
Semiconductor device and method of fabrication thereof, circuit board, and electronic equipment Oct 24, 1999 Issued
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