
Lalrinfamkim Hmar Malsawma
Examiner (ID: 2370)
| Most Active Art Unit | 2892 |
| Art Unit(s) | 2823, 2892, 2825 |
| Total Applications | 1951 |
| Issued Applications | 1709 |
| Pending Applications | 105 |
| Abandoned Applications | 179 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4155056
[patent_doc_number] => 06114198
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-09-05
[patent_title] => 'Method for forming a high surface area capacitor electrode for DRAM applications'
[patent_app_type] => 1
[patent_app_number] => 9/307209
[patent_app_country] => US
[patent_app_date] => 1999-05-07
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[pdf_file] => patents/06/114/06114198.pdf
[firstpage_image] =>[orig_patent_app_number] => 307209
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/307209 | Method for forming a high surface area capacitor electrode for DRAM applications | May 6, 1999 | Issued |
Array
(
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[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-09-05
[patent_title] => 'Method of fabricating high density flash memory with self-aligned tunneling window'
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[patent_app_number] => 9/306348
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[patent_app_date] => 1999-05-06
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/306348 | Method of fabricating high density flash memory with self-aligned tunneling window | May 5, 1999 | Issued |
Array
(
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[patent_doc_number] => 06172394
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-01-09
[patent_title] => 'Non-volatile semiconductor memory device having a floating gate with protruding conductive side-wall portions'
[patent_app_type] => 1
[patent_app_number] => 9/302398
[patent_app_country] => US
[patent_app_date] => 1999-04-30
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[patent_drawing_sheets_cnt] => 9
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/302398 | Non-volatile semiconductor memory device having a floating gate with protruding conductive side-wall portions | Apr 29, 1999 | Issued |
Array
(
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[patent_doc_number] => 06236076
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[patent_kind] => NA
[patent_issue_date] => 2001-05-22
[patent_title] => 'Ferroelectric field effect transistors for nonvolatile memory applications having functional gradient material'
[patent_app_type] => 1
[patent_app_number] => 9/301867
[patent_app_country] => US
[patent_app_date] => 1999-04-29
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/236/06236076.pdf
[firstpage_image] =>[orig_patent_app_number] => 301867
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/301867 | Ferroelectric field effect transistors for nonvolatile memory applications having functional gradient material | Apr 28, 1999 | Issued |
Array
(
[id] => 1600460
[patent_doc_number] => 06475896
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[patent_kind] => B1
[patent_issue_date] => 2002-11-05
[patent_title] => 'Electronic component and semiconductor device, method of making the same and method of mounting the same, circuit board, and electronic instrument'
[patent_app_type] => B1
[patent_app_number] => 09/117510
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/117510 | Electronic component and semiconductor device, method of making the same and method of mounting the same, circuit board, and electronic instrument | Apr 21, 1999 | Issued |
Array
(
[id] => 6032995
[patent_doc_number] => 20020019099
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-02-14
[patent_title] => 'SUPER SELF-ALIGNED TRENCH-GATE DMOS WITH REDUCED ON-RESISTANCE'
[patent_app_type] => new
[patent_app_number] => 09/296959
[patent_app_country] => US
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[pdf_file] => publications/A1/0019/20020019099.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/296959 | Super-self-aligned fabrication process of trench-gate DMOS with overlying device layer | Apr 21, 1999 | Issued |
Array
(
[id] => 4292432
[patent_doc_number] => 06268631
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[patent_kind] => NA
[patent_issue_date] => 2001-07-31
[patent_title] => 'Glass substrate assembly, semiconductor device and method of heat-treating glass substrate'
[patent_app_type] => 1
[patent_app_number] => 9/294338
[patent_app_country] => US
[patent_app_date] => 1999-04-20
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Array
(
[id] => 4354826
[patent_doc_number] => 06200877
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[patent_issue_date] => 2001-03-13
[patent_title] => 'Method of forming a charge storage electrode having a selective hemispherical grains silicon film in a semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 9/294348
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Array
(
[id] => 4357904
[patent_doc_number] => 06191022
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[patent_issue_date] => 2001-02-20
[patent_title] => 'Fine pitch solder sphere placement'
[patent_app_type] => 1
[patent_app_number] => 9/295101
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[firstpage_image] =>[orig_patent_app_number] => 295101
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/295101 | Fine pitch solder sphere placement | Apr 17, 1999 | Issued |
Array
(
[id] => 4358692
[patent_doc_number] => 06168986
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[patent_issue_date] => 2001-01-02
[patent_title] => 'Method of making a sacrificial self-aligned interconnect structure'
[patent_app_type] => 1
[patent_app_number] => 9/293369
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[patent_app_date] => 1999-04-16
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Array
(
[id] => 4286313
[patent_doc_number] => 06211041
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[patent_issue_date] => 2001-04-03
[patent_title] => 'Silicon-on-insulator (SOI) substrate and method of fabricating the same'
[patent_app_type] => 1
[patent_app_number] => 9/292948
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Array
(
[id] => 4357270
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[patent_title] => 'Method for fabricating lateral RF MOS devices with enhanced RF properties'
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Array
(
[id] => 4407212
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[patent_title] => 'Multiple threshold voltage semiconductor device fabrication technology'
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Array
(
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[patent_title] => 'Method of manufacturing flash memory'
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Array
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Array
(
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Array
(
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[patent_title] => 'CVD SOURCE MATERIAL FOR FORMING AN ELECTRODE, AND ELECTRODE AND WIRING FILM FOR CAPACITOR FORMED THEREFROM'
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Array
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Array
(
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Array
(
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