Search

Lam T. Mai

Examiner (ID: 13914)

Most Active Art Unit
2845
Art Unit(s)
2819, 2845
Total Applications
2568
Issued Applications
2446
Pending Applications
84
Abandoned Applications
75

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5635493 [patent_doc_number] => 20060066466 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-30 [patent_title] => 'HIERARCHICAL PARALLEL PIPELINED OPERATION OF ANALOG AND DIGITAL CIRCUITS' [patent_app_type] => utility [patent_app_number] => 10/948547 [patent_app_country] => US [patent_app_date] => 2004-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4316 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0066/20060066466.pdf [firstpage_image] =>[orig_patent_app_number] => 10948547 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/948547
Hierarchical parallel pipelined operation of analog and digital circuits Sep 23, 2004 Issued
Array ( [id] => 7208853 [patent_doc_number] => 20050258995 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-24 [patent_title] => 'A/D converter, D/A converter and voltage source' [patent_app_type] => utility [patent_app_number] => 10/948643 [patent_app_country] => US [patent_app_date] => 2004-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 9835 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0258/20050258995.pdf [firstpage_image] =>[orig_patent_app_number] => 10948643 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/948643
A/D converter, D/A converter and voltage source Sep 23, 2004 Issued
Array ( [id] => 935905 [patent_doc_number] => 06975255 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-12-13 [patent_title] => 'Random interleaving dither for sigma-delta analog-to-digital converters' [patent_app_type] => utility [patent_app_number] => 10/947039 [patent_app_country] => US [patent_app_date] => 2004-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 16 [patent_no_of_words] => 3098 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/975/06975255.pdf [firstpage_image] =>[orig_patent_app_number] => 10947039 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/947039
Random interleaving dither for sigma-delta analog-to-digital converters Sep 20, 2004 Issued
Array ( [id] => 976613 [patent_doc_number] => 06933866 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-08-23 [patent_title] => 'Variable data rate receiver' [patent_app_type] => utility [patent_app_number] => 10/940031 [patent_app_country] => US [patent_app_date] => 2004-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2936 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/933/06933866.pdf [firstpage_image] =>[orig_patent_app_number] => 10940031 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/940031
Variable data rate receiver Sep 13, 2004 Issued
Array ( [id] => 7023423 [patent_doc_number] => 20050017817 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-27 [patent_title] => 'OFF-CHIP BIAS FEED SYSTEM' [patent_app_type] => utility [patent_app_number] => 10/711306 [patent_app_country] => US [patent_app_date] => 2004-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3971 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0017/20050017817.pdf [firstpage_image] =>[orig_patent_app_number] => 10711306 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/711306
Methods and devices for providing bias to a monolithic microwave integrated circuit Sep 8, 2004 Issued
Array ( [id] => 7032288 [patent_doc_number] => 20050030797 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-10 [patent_title] => 'Memory module and method having improved signal routing topology' [patent_app_type] => utility [patent_app_number] => 10/932477 [patent_app_country] => US [patent_app_date] => 2004-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3408 [patent_no_of_claims] => 67 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20050030797.pdf [firstpage_image] =>[orig_patent_app_number] => 10932477 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/932477
Memory module and method having improved signal routing topology Aug 31, 2004 Issued
Array ( [id] => 7148971 [patent_doc_number] => 20050024086 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-03 [patent_title] => 'Customizable and programmable cell array' [patent_app_type] => utility [patent_app_number] => 10/927470 [patent_app_country] => US [patent_app_date] => 2004-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 74 [patent_figures_cnt] => 74 [patent_no_of_words] => 36356 [patent_no_of_claims] => 59 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 10927470 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/927470
Customizable and programmable cell array Aug 26, 2004 Issued
Array ( [id] => 935909 [patent_doc_number] => 06975259 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-12-13 [patent_title] => 'Continuous-time delta-sigma ADC with programmable input range' [patent_app_type] => utility [patent_app_number] => 10/922532 [patent_app_country] => US [patent_app_date] => 2004-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 20 [patent_no_of_words] => 8193 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/975/06975259.pdf [firstpage_image] =>[orig_patent_app_number] => 10922532 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/922532
Continuous-time delta-sigma ADC with programmable input range Aug 19, 2004 Issued
Array ( [id] => 7120691 [patent_doc_number] => 20050012520 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-20 [patent_title] => 'Customizable and programmable cell array' [patent_app_type] => utility [patent_app_number] => 10/915556 [patent_app_country] => US [patent_app_date] => 2004-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 74 [patent_figures_cnt] => 74 [patent_no_of_words] => 36856 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20050012520.pdf [firstpage_image] =>[orig_patent_app_number] => 10915556 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/915556
Array of programmable cells with customized interconnections Aug 10, 2004 Issued
Array ( [id] => 7032109 [patent_doc_number] => 20050030618 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-10 [patent_title] => 'Reflexive optical screen, and viewing system incorporating the same' [patent_app_type] => utility [patent_app_number] => 10/913466 [patent_app_country] => US [patent_app_date] => 2004-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 6249 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20050030618.pdf [firstpage_image] =>[orig_patent_app_number] => 10913466 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/913466
Reflexive optical screen, and viewing system incorporating the same Aug 8, 2004 Issued
Array ( [id] => 7614729 [patent_doc_number] => 06897799 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-05-24 [patent_title] => 'Current parking return to zero digital-to-analog converter' [patent_app_type] => utility [patent_app_number] => 10/897240 [patent_app_country] => US [patent_app_date] => 2004-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3214 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/897/06897799.pdf [firstpage_image] =>[orig_patent_app_number] => 10897240 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/897240
Current parking return to zero digital-to-analog converter Jul 21, 2004 Issued
Array ( [id] => 5684720 [patent_doc_number] => 20060283035 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-21 [patent_title] => 'Reader for a scale marking' [patent_app_type] => utility [patent_app_number] => 10/561204 [patent_app_country] => US [patent_app_date] => 2004-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2714 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0283/20060283035.pdf [firstpage_image] =>[orig_patent_app_number] => 10561204 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/561204
Reader for a scale marking Jul 18, 2004 Issued
Array ( [id] => 7239194 [patent_doc_number] => 20040257249 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-23 [patent_title] => 'Method of converting a series of data words into a modulated signal' [patent_app_type] => new [patent_app_number] => 10/893336 [patent_app_country] => US [patent_app_date] => 2004-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3800 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0257/20040257249.pdf [firstpage_image] =>[orig_patent_app_number] => 10893336 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/893336
Method of converting a series of data words into a modulated signal Jul 18, 2004 Issued
Array ( [id] => 7121039 [patent_doc_number] => 20050012868 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-20 [patent_title] => 'Analog-to-digital converting apparatus for processing a plurality of analog input signals at high rate and display device using the same' [patent_app_type] => utility [patent_app_number] => 10/892443 [patent_app_country] => US [patent_app_date] => 2004-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3104 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20050012868.pdf [firstpage_image] =>[orig_patent_app_number] => 10892443 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/892443
Analog-to-digital converting apparatus for processing a plurality of analog input signals at high rate and display device using the same Jul 15, 2004 Issued
Array ( [id] => 791070 [patent_doc_number] => 06985095 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-10 [patent_title] => 'Current supply circuit' [patent_app_type] => utility [patent_app_number] => 10/890412 [patent_app_country] => US [patent_app_date] => 2004-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 42 [patent_figures_cnt] => 46 [patent_no_of_words] => 38513 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/985/06985095.pdf [firstpage_image] =>[orig_patent_app_number] => 10890412 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/890412
Current supply circuit Jul 13, 2004 Issued
Array ( [id] => 5840746 [patent_doc_number] => 20060120244 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-08 [patent_title] => 'Decoding device and method, program recording medium, and program' [patent_app_type] => utility [patent_app_number] => 10/532858 [patent_app_country] => US [patent_app_date] => 2004-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 29650 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0120/20060120244.pdf [firstpage_image] =>[orig_patent_app_number] => 10532858 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/532858
Decoding device and method, program recording medium, and program using modulation code encoded in accordance with a variable length table Jul 4, 2004 Issued
Array ( [id] => 515096 [patent_doc_number] => 07196644 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-03-27 [patent_title] => 'Decoupling of analog input and digital output' [patent_app_type] => utility [patent_app_number] => 10/883633 [patent_app_country] => US [patent_app_date] => 2004-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 10890 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/196/07196644.pdf [firstpage_image] =>[orig_patent_app_number] => 10883633 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/883633
Decoupling of analog input and digital output Jun 30, 2004 Issued
Array ( [id] => 7087360 [patent_doc_number] => 20050007472 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-13 [patent_title] => 'Circuit arrangement and method for reducing an alignment error in a sigma-delta modulator' [patent_app_type] => utility [patent_app_number] => 10/869704 [patent_app_country] => US [patent_app_date] => 2004-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6327 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20050007472.pdf [firstpage_image] =>[orig_patent_app_number] => 10869704 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/869704
Circuit arrangement and method for reducing an alignment error in a Σ-Δ modulator Jun 15, 2004 Issued
Array ( [id] => 7054400 [patent_doc_number] => 20050275572 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-15 [patent_title] => 'METHOD AND APPARATUS FOR START-UP OF ANALOG-TO-DIGITAL CONVERTERS' [patent_app_type] => utility [patent_app_number] => 10/866438 [patent_app_country] => US [patent_app_date] => 2004-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6281 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0275/20050275572.pdf [firstpage_image] =>[orig_patent_app_number] => 10866438 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/866438
Method and apparatus for start-up of analog-to-digital converters Jun 11, 2004 Issued
Array ( [id] => 7193595 [patent_doc_number] => 20050040977 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-24 [patent_title] => 'Method for generating a reference current for sense amplifiers and corresponding generator' [patent_app_type] => utility [patent_app_number] => 10/861340 [patent_app_country] => US [patent_app_date] => 2004-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3549 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0040/20050040977.pdf [firstpage_image] =>[orig_patent_app_number] => 10861340 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/861340
Method for generating a reference current for sense amplifiers and corresponding generator Jun 3, 2004 Issued
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