Search

Lam T. Mai

Examiner (ID: 13914)

Most Active Art Unit
2845
Art Unit(s)
2819, 2845
Total Applications
2568
Issued Applications
2446
Pending Applications
84
Abandoned Applications
75

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 889891 [patent_doc_number] => 07348901 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-03-25 [patent_title] => 'Method and system for decoding variable length encoded signals, computer program product therefor' [patent_app_type] => utility [patent_app_number] => 10/561925 [patent_app_country] => US [patent_app_date] => 2003-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 5767 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/348/07348901.pdf [firstpage_image] =>[orig_patent_app_number] => 10561925 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/561925
Method and system for decoding variable length encoded signals, computer program product therefor Jun 23, 2003 Issued
Array ( [id] => 1097978 [patent_doc_number] => 06822477 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-11-23 [patent_title] => 'Integrated circuit and associated design method using spare gate islands' [patent_app_type] => B1 [patent_app_number] => 10/600042 [patent_app_country] => US [patent_app_date] => 2003-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5497 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 27 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/822/06822477.pdf [firstpage_image] =>[orig_patent_app_number] => 10600042 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/600042
Integrated circuit and associated design method using spare gate islands Jun 19, 2003 Issued
Array ( [id] => 7409022 [patent_doc_number] => 20040227470 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-18 [patent_title] => 'Thin magnetron structures for plasma generation in ion implantation systems' [patent_app_type] => new [patent_app_number] => 10/600775 [patent_app_country] => US [patent_app_date] => 2003-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7288 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0227/20040227470.pdf [firstpage_image] =>[orig_patent_app_number] => 10600775 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/600775
Thin magnetron structures for plasma generation in ion implantation systems Jun 19, 2003 Issued
Array ( [id] => 7310594 [patent_doc_number] => 20040032348 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-19 [patent_title] => 'Distributed on-demand media transcoding system and method' [patent_app_type] => new [patent_app_number] => 10/465805 [patent_app_country] => US [patent_app_date] => 2003-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 12154 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0032/20040032348.pdf [firstpage_image] =>[orig_patent_app_number] => 10465805 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/465805
Distributed on-demand media transcoding system and method Jun 19, 2003 Issued
Array ( [id] => 1103247 [patent_doc_number] => 06816042 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-11-09 [patent_title] => 'Process to make lightweight objects' [patent_app_type] => B1 [patent_app_number] => 10/465261 [patent_app_country] => US [patent_app_date] => 2003-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 30 [patent_no_of_words] => 5506 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/816/06816042.pdf [firstpage_image] =>[orig_patent_app_number] => 10465261 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/465261
Process to make lightweight objects Jun 18, 2003 Issued
Array ( [id] => 7067595 [patent_doc_number] => 20050242978 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-03 [patent_title] => 'Circuit arrangement and method for sigma-delta conversion with reduced idle tones' [patent_app_type] => utility [patent_app_number] => 10/519603 [patent_app_country] => US [patent_app_date] => 2003-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2003 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0242/20050242978.pdf [firstpage_image] =>[orig_patent_app_number] => 10519603 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/519603
Circuit arrangement and method for sigma-delta conversion with reduced idle tones Jun 18, 2003 Issued
Array ( [id] => 7263124 [patent_doc_number] => 20040261120 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-23 [patent_title] => 'Digital signal processing scheme for high performance HFC digital return path system with bandwidth conservation' [patent_app_type] => new [patent_app_number] => 10/465326 [patent_app_country] => US [patent_app_date] => 2003-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4742 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0261/20040261120.pdf [firstpage_image] =>[orig_patent_app_number] => 10465326 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/465326
Digital signal processing scheme for high performance HFC digital return path system with bandwidth conservation Jun 17, 2003 Issued
Array ( [id] => 931632 [patent_doc_number] => 06980138 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-12-27 [patent_title] => 'Method and a system for variable-length decoding, and a device for the localization of codewords' [patent_app_type] => utility [patent_app_number] => 10/465033 [patent_app_country] => US [patent_app_date] => 2003-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 5101 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/980/06980138.pdf [firstpage_image] =>[orig_patent_app_number] => 10465033 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/465033
Method and a system for variable-length decoding, and a device for the localization of codewords Jun 17, 2003 Issued
Array ( [id] => 1054298 [patent_doc_number] => 06859159 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-22 [patent_title] => 'Switched-capacitor structures with enhanced isolation' [patent_app_type] => utility [patent_app_number] => 10/463933 [patent_app_country] => US [patent_app_date] => 2003-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2452 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/859/06859159.pdf [firstpage_image] =>[orig_patent_app_number] => 10463933 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/463933
Switched-capacitor structures with enhanced isolation Jun 17, 2003 Issued
Array ( [id] => 1022827 [patent_doc_number] => 06888374 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-03 [patent_title] => 'FPGA peripheral routing with symmetric edge termination at FPGA boundaries' [patent_app_type] => utility [patent_app_number] => 10/464420 [patent_app_country] => US [patent_app_date] => 2003-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1648 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/888/06888374.pdf [firstpage_image] =>[orig_patent_app_number] => 10464420 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/464420
FPGA peripheral routing with symmetric edge termination at FPGA boundaries Jun 16, 2003 Issued
Array ( [id] => 7135323 [patent_doc_number] => 20040043671 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-04 [patent_title] => 'Data converter' [patent_app_type] => new [patent_app_number] => 10/464814 [patent_app_country] => US [patent_app_date] => 2003-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3516 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0043/20040043671.pdf [firstpage_image] =>[orig_patent_app_number] => 10464814 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/464814
Data converter Jun 16, 2003 Issued
Array ( [id] => 7238302 [patent_doc_number] => 20040257108 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-23 [patent_title] => 'Single event hardening of null convention logic circuits' [patent_app_type] => new [patent_app_number] => 10/463794 [patent_app_country] => US [patent_app_date] => 2003-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5241 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0257/20040257108.pdf [firstpage_image] =>[orig_patent_app_number] => 10463794 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/463794
Single event hardening of null convention logic circuits Jun 16, 2003 Issued
Array ( [id] => 941722 [patent_doc_number] => 06970114 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-11-29 [patent_title] => 'Gate-based zero-stripping, varying length datum segment and arithmetic method and apparatus' [patent_app_type] => utility [patent_app_number] => 10/462868 [patent_app_country] => US [patent_app_date] => 2003-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 12150 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 16 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/970/06970114.pdf [firstpage_image] =>[orig_patent_app_number] => 10462868 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/462868
Gate-based zero-stripping, varying length datum segment and arithmetic method and apparatus Jun 15, 2003 Issued
Array ( [id] => 1050965 [patent_doc_number] => 06861868 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-03-01 [patent_title] => 'High speed interface for a programmable interconnect circuit' [patent_app_type] => utility [patent_app_number] => 10/463781 [patent_app_country] => US [patent_app_date] => 2003-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9532 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/861/06861868.pdf [firstpage_image] =>[orig_patent_app_number] => 10463781 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/463781
High speed interface for a programmable interconnect circuit Jun 15, 2003 Issued
Array ( [id] => 458247 [patent_doc_number] => 07245145 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-17 [patent_title] => 'Memory module and method having improved signal routing topology' [patent_app_type] => utility [patent_app_number] => 10/460588 [patent_app_country] => US [patent_app_date] => 2003-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3412 [patent_no_of_claims] => 89 [patent_no_of_ind_claims] => 17 [patent_words_short_claim] => 20 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/245/07245145.pdf [firstpage_image] =>[orig_patent_app_number] => 10460588 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/460588
Memory module and method having improved signal routing topology Jun 10, 2003 Issued
Array ( [id] => 458247 [patent_doc_number] => 07245145 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-17 [patent_title] => 'Memory module and method having improved signal routing topology' [patent_app_type] => utility [patent_app_number] => 10/460588 [patent_app_country] => US [patent_app_date] => 2003-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3412 [patent_no_of_claims] => 89 [patent_no_of_ind_claims] => 17 [patent_words_short_claim] => 20 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/245/07245145.pdf [firstpage_image] =>[orig_patent_app_number] => 10460588 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/460588
Memory module and method having improved signal routing topology Jun 10, 2003 Issued
Array ( [id] => 458247 [patent_doc_number] => 07245145 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-17 [patent_title] => 'Memory module and method having improved signal routing topology' [patent_app_type] => utility [patent_app_number] => 10/460588 [patent_app_country] => US [patent_app_date] => 2003-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3412 [patent_no_of_claims] => 89 [patent_no_of_ind_claims] => 17 [patent_words_short_claim] => 20 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/245/07245145.pdf [firstpage_image] =>[orig_patent_app_number] => 10460588 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/460588
Memory module and method having improved signal routing topology Jun 10, 2003 Issued
Array ( [id] => 458247 [patent_doc_number] => 07245145 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-17 [patent_title] => 'Memory module and method having improved signal routing topology' [patent_app_type] => utility [patent_app_number] => 10/460588 [patent_app_country] => US [patent_app_date] => 2003-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3412 [patent_no_of_claims] => 89 [patent_no_of_ind_claims] => 17 [patent_words_short_claim] => 20 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/245/07245145.pdf [firstpage_image] =>[orig_patent_app_number] => 10460588 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/460588
Memory module and method having improved signal routing topology Jun 10, 2003 Issued
Array ( [id] => 6723724 [patent_doc_number] => 20030206036 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-06 [patent_title] => 'Customizable and programmable cell array' [patent_app_type] => new [patent_app_number] => 10/452049 [patent_app_country] => US [patent_app_date] => 2003-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 74 [patent_figures_cnt] => 74 [patent_no_of_words] => 37350 [patent_no_of_claims] => 56 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0206/20030206036.pdf [firstpage_image] =>[orig_patent_app_number] => 10452049 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/452049
Customizable and programmable cell array Jun 2, 2003 Issued
Array ( [id] => 935834 [patent_doc_number] => 06975184 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-12-13 [patent_title] => 'Adjusting the frequency of film bulk acoustic resonators' [patent_app_type] => utility [patent_app_number] => 10/448915 [patent_app_country] => US [patent_app_date] => 2003-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1216 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/975/06975184.pdf [firstpage_image] =>[orig_patent_app_number] => 10448915 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/448915
Adjusting the frequency of film bulk acoustic resonators May 29, 2003 Issued
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