Search

Lam T. Mai

Examiner (ID: 1764, Office: P/2845 )

Most Active Art Unit
2845
Art Unit(s)
2819, 2845
Total Applications
2632
Issued Applications
2481
Pending Applications
108
Abandoned Applications
77

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7577371 [patent_doc_number] => 20110291253 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-01 [patent_title] => 'LEAD FRAME, ELECTRONIC COMPONENT INCLUDING THE LEAD FRAME, AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/204102 [patent_app_country] => US [patent_app_date] => 2011-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 12338 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0291/20110291253.pdf [firstpage_image] =>[orig_patent_app_number] => 13204102 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/204102
LEAD FRAME, ELECTRONIC COMPONENT INCLUDING THE LEAD FRAME, AND MANUFACTURING METHOD THEREOF Aug 4, 2011 Abandoned
Array ( [id] => 8582733 [patent_doc_number] => 20130001554 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-03 [patent_title] => 'Method Of Manufacturing Electric Device, Array Of Electric Devices, And Manufacturing Method Therefor' [patent_app_type] => utility [patent_app_number] => 13/173986 [patent_app_country] => US [patent_app_date] => 2011-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 7925 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13173986 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/173986
Method of manufacturing electric device, array of electric devices, and manufacturing method therefor Jun 29, 2011 Issued
Array ( [id] => 8543253 [patent_doc_number] => 08318542 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-27 [patent_title] => 'Contact spring application to semiconductor devices' [patent_app_type] => utility [patent_app_number] => 13/162473 [patent_app_country] => US [patent_app_date] => 2011-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 2043 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13162473 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/162473
Contact spring application to semiconductor devices Jun 15, 2011 Issued
Array ( [id] => 8075133 [patent_doc_number] => 20110239458 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-06 [patent_title] => 'THERMO-COMPRESSION BONDED ELECTRICAL INTERCONNECT STRUCTURE AND METHOD' [patent_app_type] => utility [patent_app_number] => 13/159773 [patent_app_country] => US [patent_app_date] => 2011-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6479 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0239/20110239458.pdf [firstpage_image] =>[orig_patent_app_number] => 13159773 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/159773
Thermo-compression bonded electrical interconnect structure and method Jun 13, 2011 Issued
Array ( [id] => 8932500 [patent_doc_number] => 08492198 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-23 [patent_title] => 'Microelectronic workpieces with stand-off projections and methods for manufacturing microelectronic devices using such workpieces' [patent_app_type] => utility [patent_app_number] => 13/088137 [patent_app_country] => US [patent_app_date] => 2011-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 4417 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13088137 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/088137
Microelectronic workpieces with stand-off projections and methods for manufacturing microelectronic devices using such workpieces Apr 14, 2011 Issued
Array ( [id] => 6170047 [patent_doc_number] => 20110175223 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-21 [patent_title] => 'Stacked Semiconductor Components Having Conductive Interconnects' [patent_app_type] => utility [patent_app_number] => 13/076505 [patent_app_country] => US [patent_app_date] => 2011-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 12692 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0175/20110175223.pdf [firstpage_image] =>[orig_patent_app_number] => 13076505 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/076505
Stacked semiconductor components having conductive interconnects Mar 30, 2011 Issued
Array ( [id] => 6189147 [patent_doc_number] => 20110171823 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-14 [patent_title] => 'DIELECTRIC SPACERS FOR METAL INTERCONNECTS AND METHOD TO FORM THE SAME' [patent_app_type] => utility [patent_app_number] => 13/069253 [patent_app_country] => US [patent_app_date] => 2011-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4868 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0171/20110171823.pdf [firstpage_image] =>[orig_patent_app_number] => 13069253 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/069253
Dielectric spacers for metal interconnects and method to form the same Mar 21, 2011 Issued
Array ( [id] => 6075311 [patent_doc_number] => 20110140236 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-16 [patent_title] => 'Integrated Circuit with Pads Connected by an Under-Bump Metallization and Method for Production Thereof' [patent_app_type] => utility [patent_app_number] => 13/032248 [patent_app_country] => US [patent_app_date] => 2011-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1221 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0140/20110140236.pdf [firstpage_image] =>[orig_patent_app_number] => 13032248 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/032248
Integrated circuit with pads connected by an under-bump metallization and method for production thereof Feb 21, 2011 Issued
Array ( [id] => 9402336 [patent_doc_number] => 08692390 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-08 [patent_title] => 'Pyramid bump structure' [patent_app_type] => utility [patent_app_number] => 13/030203 [patent_app_country] => US [patent_app_date] => 2011-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 2324 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13030203 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/030203
Pyramid bump structure Feb 17, 2011 Issued
Array ( [id] => 6177753 [patent_doc_number] => 20110121447 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-26 [patent_title] => 'ADHESIVE FOR CONNECTION OF CIRCUIT MEMBER AND SEMICONDUCTOR DEVICE USING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/023208 [patent_app_country] => US [patent_app_date] => 2011-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 14671 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0121/20110121447.pdf [firstpage_image] =>[orig_patent_app_number] => 13023208 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/023208
ADHESIVE FOR CONNECTION OF CIRCUIT MEMBER AND SEMICONDUCTOR DEVICE USING THE SAME Feb 7, 2011 Abandoned
Array ( [id] => 6137602 [patent_doc_number] => 20110127678 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-02 [patent_title] => 'INTEGRATED CIRCUIT PACKAGING SYSTEM WITH EMBEDDED CIRCUITRY AND POST' [patent_app_type] => utility [patent_app_number] => 13/023293 [patent_app_country] => US [patent_app_date] => 2011-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6435 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0127/20110127678.pdf [firstpage_image] =>[orig_patent_app_number] => 13023293 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/023293
Integrated circuit packaging system with embedded circuitry and post Feb 7, 2011 Issued
Array ( [id] => 6137575 [patent_doc_number] => 20110127667 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-02 [patent_title] => 'ADHESIVE FOR CONNECTION OF CIRCUIT MEMBER AND SEMICONDUCTOR DEVICE USING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/023195 [patent_app_country] => US [patent_app_date] => 2011-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 14671 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0127/20110127667.pdf [firstpage_image] =>[orig_patent_app_number] => 13023195 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/023195
ADHESIVE FOR CONNECTION OF CIRCUIT MEMBER AND SEMICONDUCTOR DEVICE USING THE SAME Feb 7, 2011 Abandoned
Array ( [id] => 6208446 [patent_doc_number] => 20110133346 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-09 [patent_title] => 'ADHESIVE FOR CONNECTION OF CIRCUIT MEMBER AND SEMICONDUCTOR DEVICE USING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/023222 [patent_app_country] => US [patent_app_date] => 2011-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 14669 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20110133346.pdf [firstpage_image] =>[orig_patent_app_number] => 13023222 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/023222
ADHESIVE FOR CONNECTION OF CIRCUIT MEMBER AND SEMICONDUCTOR DEVICE USING THE SAME Feb 7, 2011 Abandoned
Array ( [id] => 8897151 [patent_doc_number] => 08476674 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-02 [patent_title] => 'Gate conductor with a diffusion barrier' [patent_app_type] => utility [patent_app_number] => 13/010009 [patent_app_country] => US [patent_app_date] => 2011-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 35 [patent_no_of_words] => 3421 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13010009 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/010009
Gate conductor with a diffusion barrier Jan 19, 2011 Issued
Array ( [id] => 6120838 [patent_doc_number] => 20110084357 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-14 [patent_title] => 'Self Aligned Air-Gap in Interconnect Structures' [patent_app_type] => utility [patent_app_number] => 12/972228 [patent_app_country] => US [patent_app_date] => 2010-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3341 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0084/20110084357.pdf [firstpage_image] =>[orig_patent_app_number] => 12972228 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/972228
Self aligned air-gap in interconnect structures Dec 16, 2010 Issued
Array ( [id] => 7706665 [patent_doc_number] => 20120001323 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-05 [patent_title] => 'Semiconductor Device Including Ultra Low-K (ULK) Metallization Stacks with Reduced Chip-Package Interaction' [patent_app_type] => utility [patent_app_number] => 12/966302 [patent_app_country] => US [patent_app_date] => 2010-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7371 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12966302 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/966302
Semiconductor device including ultra low-K (ULK) metallization stacks with reduced chip-package interaction Dec 12, 2010 Issued
Array ( [id] => 6075374 [patent_doc_number] => 20110140266 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-16 [patent_title] => 'ELECTROSTATIC CAPACITANCE-TYPE INPUT DEVICE AND METHOD OF MANUFACTURING THEREOF' [patent_app_type] => utility [patent_app_number] => 12/962043 [patent_app_country] => US [patent_app_date] => 2010-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8845 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0140/20110140266.pdf [firstpage_image] =>[orig_patent_app_number] => 12962043 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/962043
Electrostatic capacitance-type input device and method of manufacturing thereof Dec 6, 2010 Issued
Array ( [id] => 8897242 [patent_doc_number] => 08476765 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-02 [patent_title] => 'Copper interconnect structure having a graphene cap' [patent_app_type] => utility [patent_app_number] => 12/961251 [patent_app_country] => US [patent_app_date] => 2010-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2887 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12961251 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/961251
Copper interconnect structure having a graphene cap Dec 5, 2010 Issued
Array ( [id] => 7738927 [patent_doc_number] => 20120018885 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-26 [patent_title] => 'SEMICONDUCTOR APPARATUS HAVING THROUGH VIAS' [patent_app_type] => utility [patent_app_number] => 12/960843 [patent_app_country] => US [patent_app_date] => 2010-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 14738 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0018/20120018885.pdf [firstpage_image] =>[orig_patent_app_number] => 12960843 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/960843
Semiconductor apparatus having through vias configured to isolate power supplied to a memory chip from data signals supplied to the memory chip Dec 5, 2010 Issued
Array ( [id] => 9504158 [patent_doc_number] => 08742477 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-06-03 [patent_title] => 'Elliptical through silicon vias for active interposers' [patent_app_type] => utility [patent_app_number] => 12/961376 [patent_app_country] => US [patent_app_date] => 2010-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 6554 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12961376 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/961376
Elliptical through silicon vias for active interposers Dec 5, 2010 Issued
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