
Lam T. Mai
Examiner (ID: 13914)
| Most Active Art Unit | 2845 |
| Art Unit(s) | 2819, 2845 |
| Total Applications | 2568 |
| Issued Applications | 2446 |
| Pending Applications | 84 |
| Abandoned Applications | 75 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
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[patent_title] => 'Time-interleaved pipelined-SAR analog to digital converter with low power consumption'
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Array
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[patent_issue_date] => 2013-03-14
[patent_title] => 'EXCESS LOOP DELAY COMPENSATION FOR A CONTINUOUS TIME SIGMA DELTA MODULATOR'
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Array
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[patent_title] => 'Sparse data compression'
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Array
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[patent_issue_date] => 2015-02-24
[patent_title] => 'Multimode control device for allocating resources to communication devices that use differing protocols and methods for use therewith'
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Array
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[patent_title] => 'Multi-input multi-output time encoding and decoding machines'
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Array
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[patent_title] => 'System and method for providing channel configurations in a communications environment'
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Array
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Array
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[patent_issue_date] => 2013-02-07
[patent_title] => 'ANALOG INPUT SYSTEM, ANALOG OUTPUT SYSTEM, AND ANALOG INPUT/OUTPUT SYSTEM'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/503303 | Analog input system, analog output system, and analog input/output system | Jul 31, 2011 | Issued |
Array
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[patent_title] => 'Synchronous switching in high-speed digital-to-analog converter using quad synchronizing latch'
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Array
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[id] => 7571552
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[patent_issue_date] => 2011-11-03
[patent_title] => 'ENCODING AND DECODING METHODS AND DEVICES EMPLOYING DUAL CODESETS'
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[patent_app_number] => 13/180616
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/180616 | Encoding and decoding methods and devices employing dual codesets | Jul 11, 2011 | Issued |
Array
(
[id] => 7729105
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[patent_title] => 'SWITCHED CAPACITOR TYPE D/A CONVERTER'
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Array
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Array
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Array
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Array
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