Search

Lam T. Mai

Examiner (ID: 13914)

Most Active Art Unit
2845
Art Unit(s)
2819, 2845
Total Applications
2568
Issued Applications
2446
Pending Applications
84
Abandoned Applications
75

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8773390 [patent_doc_number] => 08427355 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-23 [patent_title] => 'Time-interleaved pipelined-SAR analog to digital converter with low power consumption' [patent_app_type] => utility [patent_app_number] => 13/232442 [patent_app_country] => US [patent_app_date] => 2011-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1975 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13232442 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/232442
Time-interleaved pipelined-SAR analog to digital converter with low power consumption Sep 13, 2011 Issued
Array ( [id] => 8706002 [patent_doc_number] => 20130063291 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-14 [patent_title] => 'EXCESS LOOP DELAY COMPENSATION FOR A CONTINUOUS TIME SIGMA DELTA MODULATOR' [patent_app_type] => utility [patent_app_number] => 13/229462 [patent_app_country] => US [patent_app_date] => 2011-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3851 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13229462 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/229462
Excess loop delay compensation for a continuous time sigma delta modulator Sep 8, 2011 Issued
Array ( [id] => 9441900 [patent_doc_number] => 08711015 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-29 [patent_title] => 'Sparse data compression' [patent_app_type] => utility [patent_app_number] => 13/216295 [patent_app_country] => US [patent_app_date] => 2011-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 12963 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13216295 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/216295
Sparse data compression Aug 23, 2011 Issued
Array ( [id] => 9878136 [patent_doc_number] => 08965431 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-24 [patent_title] => 'Multimode control device for allocating resources to communication devices that use differing protocols and methods for use therewith' [patent_app_type] => utility [patent_app_number] => 13/214947 [patent_app_country] => US [patent_app_date] => 2011-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 7187 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13214947 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/214947
Multimode control device for allocating resources to communication devices that use differing protocols and methods for use therewith Aug 21, 2011 Issued
Array ( [id] => 9966015 [patent_doc_number] => 09013635 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-21 [patent_title] => 'Multi-input multi-output time encoding and decoding machines' [patent_app_type] => utility [patent_app_number] => 13/214041 [patent_app_country] => US [patent_app_date] => 2011-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 7615 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13214041 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/214041
Multi-input multi-output time encoding and decoding machines Aug 18, 2011 Issued
Array ( [id] => 9706576 [patent_doc_number] => 08831664 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-09 [patent_title] => 'System and method for providing channel configurations in a communications environment' [patent_app_type] => utility [patent_app_number] => 13/210967 [patent_app_country] => US [patent_app_date] => 2011-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4421 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13210967 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/210967
System and method for providing channel configurations in a communications environment Aug 15, 2011 Issued
Array ( [id] => 9216989 [patent_doc_number] => 08629793 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-01-14 [patent_title] => 'Continuous-time delta-sigma ADC with compact structure' [patent_app_type] => utility [patent_app_number] => 13/197756 [patent_app_country] => US [patent_app_date] => 2011-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5582 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13197756 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/197756
Continuous-time delta-sigma ADC with compact structure Aug 2, 2011 Issued
Array ( [id] => 8647660 [patent_doc_number] => 20130033390 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-07 [patent_title] => 'ANALOG INPUT SYSTEM, ANALOG OUTPUT SYSTEM, AND ANALOG INPUT/OUTPUT SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/503303 [patent_app_country] => US [patent_app_date] => 2011-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7147 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13503303 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/503303
Analog input system, analog output system, and analog input/output system Jul 31, 2011 Issued
Array ( [id] => 8859492 [patent_doc_number] => 08462034 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-11 [patent_title] => 'Synchronous switching in high-speed digital-to-analog converter using quad synchronizing latch' [patent_app_type] => utility [patent_app_number] => 13/183370 [patent_app_country] => US [patent_app_date] => 2011-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4360 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13183370 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/183370
Synchronous switching in high-speed digital-to-analog converter using quad synchronizing latch Jul 13, 2011 Issued
Array ( [id] => 7571552 [patent_doc_number] => 20110267208 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-03 [patent_title] => 'ENCODING AND DECODING METHODS AND DEVICES EMPLOYING DUAL CODESETS' [patent_app_type] => utility [patent_app_number] => 13/180616 [patent_app_country] => US [patent_app_date] => 2011-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10211 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0267/20110267208.pdf [firstpage_image] =>[orig_patent_app_number] => 13180616 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/180616
Encoding and decoding methods and devices employing dual codesets Jul 11, 2011 Issued
Array ( [id] => 7729105 [patent_doc_number] => 20120013496 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-19 [patent_title] => 'SWITCHED CAPACITOR TYPE D/A CONVERTER' [patent_app_type] => utility [patent_app_number] => 13/179660 [patent_app_country] => US [patent_app_date] => 2011-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5082 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0013/20120013496.pdf [firstpage_image] =>[orig_patent_app_number] => 13179660 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/179660
Switched capacitor type D/A converter Jul 10, 2011 Issued
Array ( [id] => 7718003 [patent_doc_number] => 20120007754 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-12 [patent_title] => 'METHOD AND APPARATUS FOR DECODING TRANSMITTED/RECEIVED DATA' [patent_app_type] => utility [patent_app_number] => 13/179521 [patent_app_country] => US [patent_app_date] => 2011-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3132 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20120007754.pdf [firstpage_image] =>[orig_patent_app_number] => 13179521 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/179521
Method and apparatus for decoding transmitted/received data Jul 8, 2011 Issued
Array ( [id] => 9128146 [patent_doc_number] => 08576097 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-05 [patent_title] => 'Coding using a mapping between a syntax element and a code word' [patent_app_type] => utility [patent_app_number] => 13/177126 [patent_app_country] => US [patent_app_date] => 2011-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 18 [patent_no_of_words] => 16412 [patent_no_of_claims] => 53 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13177126 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/177126
Coding using a mapping between a syntax element and a code word Jul 5, 2011 Issued
Array ( [id] => 8859486 [patent_doc_number] => 08462028 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-11 [patent_title] => 'Parallel to serial conversion apparatus and method of converting parallel data having different widths' [patent_app_type] => utility [patent_app_number] => 13/176358 [patent_app_country] => US [patent_app_date] => 2011-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7262 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13176358 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/176358
Parallel to serial conversion apparatus and method of converting parallel data having different widths Jul 4, 2011 Issued
Array ( [id] => 8583641 [patent_doc_number] => 20130002462 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-03 [patent_title] => 'Analog to Digital Converter with Generalized Beamformer' [patent_app_type] => utility [patent_app_number] => 13/174273 [patent_app_country] => US [patent_app_date] => 2011-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6093 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13174273 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/174273
Analog to digital converter with generalized beamformer Jun 29, 2011 Issued
Array ( [id] => 8876783 [patent_doc_number] => 08471751 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-25 [patent_title] => 'Two-stage analog-to-digital converter using SAR and TDC' [patent_app_type] => utility [patent_app_number] => 13/174689 [patent_app_country] => US [patent_app_date] => 2011-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5352 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13174689 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/174689
Two-stage analog-to-digital converter using SAR and TDC Jun 29, 2011 Issued
Array ( [id] => 7707598 [patent_doc_number] => 20120001779 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-05 [patent_title] => 'SERIALIZER CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/174562 [patent_app_country] => US [patent_app_date] => 2011-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 51 [patent_figures_cnt] => 51 [patent_no_of_words] => 27147 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13174562 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/174562
Chemical detection circuit including a serializer circuit Jun 29, 2011 Issued
Array ( [id] => 7707600 [patent_doc_number] => 20120001781 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-05 [patent_title] => 'Digital Background Calibration System and Method for Successive Approximation (SAR) Analogue to Digital Converter' [patent_app_type] => utility [patent_app_number] => 13/173624 [patent_app_country] => US [patent_app_date] => 2011-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 6705 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13173624 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/173624
Digital background calibration system and method for successive approximation (SAR) analogue to digital converter Jun 29, 2011 Issued
Array ( [id] => 8060621 [patent_doc_number] => 20110246710 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-06 [patent_title] => 'Encoding and Decoding to Reduce Switching of Flash Memory Transistors' [patent_app_type] => utility [patent_app_number] => 13/160055 [patent_app_country] => US [patent_app_date] => 2011-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3714 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0246/20110246710.pdf [firstpage_image] =>[orig_patent_app_number] => 13160055 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/160055
Encoding and decoding to reduce switching of flash memory transistors Jun 13, 2011 Issued
Array ( [id] => 8070203 [patent_doc_number] => 20110241920 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-06 [patent_title] => 'RESISTANCE-TYPE DIGITAL-TO-ANALOG CONVERTER' [patent_app_type] => utility [patent_app_number] => 13/159698 [patent_app_country] => US [patent_app_date] => 2011-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8618 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0241/20110241920.pdf [firstpage_image] =>[orig_patent_app_number] => 13159698 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/159698
RESISTANCE-TYPE DIGITAL-TO-ANALOG CONVERTER Jun 13, 2011 Abandoned
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