Search

Lam T. Mai

Examiner (ID: 13914)

Most Active Art Unit
2845
Art Unit(s)
2819, 2845
Total Applications
2568
Issued Applications
2446
Pending Applications
84
Abandoned Applications
75

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7815780 [patent_doc_number] => 20120062400 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-15 [patent_title] => 'ANALOG DIGITAL CONVERTING DEVICE AND REFERENCE VOLTAGE CONTROLLING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/982547 [patent_app_country] => US [patent_app_date] => 2010-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7776 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0062/20120062400.pdf [firstpage_image] =>[orig_patent_app_number] => 12982547 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/982547
Analog digital converting device and reference voltage controlling method thereof Dec 29, 2010 Issued
Array ( [id] => 5981571 [patent_doc_number] => 20110095926 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-28 [patent_title] => 'ANALOG-TO-DIGITAL CONVERSION IN PIXEL ARRAYS' [patent_app_type] => utility [patent_app_number] => 12/981911 [patent_app_country] => US [patent_app_date] => 2010-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 9324 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0095/20110095926.pdf [firstpage_image] =>[orig_patent_app_number] => 12981911 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/981911
Analog-to-digital conversion in pixel arrays using a ramp signal having a single cycle Dec 29, 2010 Issued
Array ( [id] => 5964984 [patent_doc_number] => 20110148679 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-23 [patent_title] => 'RECONFIGURABLE BANDPASS DELTA-SIGMA MODULATOR' [patent_app_type] => utility [patent_app_number] => 12/981722 [patent_app_country] => US [patent_app_date] => 2010-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5801 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0148/20110148679.pdf [firstpage_image] =>[orig_patent_app_number] => 12981722 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/981722
Reconfigurable bandpass delta-sigma modulator Dec 29, 2010 Issued
Array ( [id] => 7481072 [patent_doc_number] => 20110248873 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-13 [patent_title] => 'VARIABLE LENGTH CODES FOR CODING OF VIDEO DATA' [patent_app_type] => utility [patent_app_number] => 12/979751 [patent_app_country] => US [patent_app_date] => 2010-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 13972 [patent_no_of_claims] => 60 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0248/20110248873.pdf [firstpage_image] =>[orig_patent_app_number] => 12979751 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/979751
Variable length codes for coding of video data Dec 27, 2010 Issued
Array ( [id] => 9075313 [patent_doc_number] => 08552895 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-08 [patent_title] => 'Sigma-delta modulator for reducing power consumption and suitable for high-speed operations' [patent_app_type] => utility [patent_app_number] => 13/519501 [patent_app_country] => US [patent_app_date] => 2010-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9617 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13519501 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/519501
Sigma-delta modulator for reducing power consumption and suitable for high-speed operations Dec 21, 2010 Issued
Array ( [id] => 8249859 [patent_doc_number] => 20120154185 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-21 [patent_title] => 'Providing A Feedback Loop In A Low Latency Serial Interconnect Architecture' [patent_app_type] => utility [patent_app_number] => 12/969249 [patent_app_country] => US [patent_app_date] => 2010-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3568 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0154/20120154185.pdf [firstpage_image] =>[orig_patent_app_number] => 12969249 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/969249
Providing a feedback loop in a low latency serial interconnect architecture Dec 14, 2010 Issued
Array ( [id] => 8249859 [patent_doc_number] => 20120154185 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-21 [patent_title] => 'Providing A Feedback Loop In A Low Latency Serial Interconnect Architecture' [patent_app_type] => utility [patent_app_number] => 12/969249 [patent_app_country] => US [patent_app_date] => 2010-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3568 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0154/20120154185.pdf [firstpage_image] =>[orig_patent_app_number] => 12969249 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/969249
Providing a feedback loop in a low latency serial interconnect architecture Dec 14, 2010 Issued
Array ( [id] => 8249859 [patent_doc_number] => 20120154185 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-21 [patent_title] => 'Providing A Feedback Loop In A Low Latency Serial Interconnect Architecture' [patent_app_type] => utility [patent_app_number] => 12/969249 [patent_app_country] => US [patent_app_date] => 2010-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3568 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0154/20120154185.pdf [firstpage_image] =>[orig_patent_app_number] => 12969249 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/969249
Providing a feedback loop in a low latency serial interconnect architecture Dec 14, 2010 Issued
Array ( [id] => 8249859 [patent_doc_number] => 20120154185 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-21 [patent_title] => 'Providing A Feedback Loop In A Low Latency Serial Interconnect Architecture' [patent_app_type] => utility [patent_app_number] => 12/969249 [patent_app_country] => US [patent_app_date] => 2010-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3568 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0154/20120154185.pdf [firstpage_image] =>[orig_patent_app_number] => 12969249 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/969249
Providing a feedback loop in a low latency serial interconnect architecture Dec 14, 2010 Issued
Array ( [id] => 5964982 [patent_doc_number] => 20110148677 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-23 [patent_title] => 'D-CLASS DIGITAL AMPLIFIER CONFIGURED FOR SHAPING NON-IDEALITIES OF AN OUTPUT SIGNAL' [patent_app_type] => utility [patent_app_number] => 12/969449 [patent_app_country] => US [patent_app_date] => 2010-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 13832 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0148/20110148677.pdf [firstpage_image] =>[orig_patent_app_number] => 12969449 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/969449
D-class digital amplifier configured for shaping non-idealities of an output signal Dec 14, 2010 Issued
Array ( [id] => 8318053 [patent_doc_number] => 08232832 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-31 [patent_title] => 'Voltage adder circuit and D/A converter circuit' [patent_app_type] => utility [patent_app_number] => 12/928529 [patent_app_country] => US [patent_app_date] => 2010-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 5239 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12928529 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/928529
Voltage adder circuit and D/A converter circuit Dec 13, 2010 Issued
Array ( [id] => 6076630 [patent_doc_number] => 20110140944 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-16 [patent_title] => 'DIGITAL-TO-ANALOG CONVERTER' [patent_app_type] => utility [patent_app_number] => 12/967229 [patent_app_country] => US [patent_app_date] => 2010-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10435 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0140/20110140944.pdf [firstpage_image] =>[orig_patent_app_number] => 12967229 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/967229
Resistor string digital-to-analog converter Dec 13, 2010 Issued
Array ( [id] => 8341012 [patent_doc_number] => 08242940 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-14 [patent_title] => 'Transitioning digital data processors between power savings and non-power savings modes' [patent_app_type] => utility [patent_app_number] => 12/966045 [patent_app_country] => US [patent_app_date] => 2010-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 8323 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12966045 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/966045
Transitioning digital data processors between power savings and non-power savings modes Dec 12, 2010 Issued
Array ( [id] => 9154551 [patent_doc_number] => 08587460 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-19 [patent_title] => 'A/D conversion device and compensation control method for A/D conversion device' [patent_app_type] => utility [patent_app_number] => 13/514775 [patent_app_country] => US [patent_app_date] => 2010-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 12674 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13514775 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/514775
A/D conversion device and compensation control method for A/D conversion device Dec 9, 2010 Issued
Array ( [id] => 8411019 [patent_doc_number] => 08274417 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-25 [patent_title] => 'Coarse digital-to-analog converter architecture for voltage interpolation DAC' [patent_app_type] => utility [patent_app_number] => 12/965651 [patent_app_country] => US [patent_app_date] => 2010-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7440 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12965651 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/965651
Coarse digital-to-analog converter architecture for voltage interpolation DAC Dec 9, 2010 Issued
Array ( [id] => 6155435 [patent_doc_number] => 20110156935 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-30 [patent_title] => 'APPARATUS AND METHOD FOR SIMPLIFYING DIGITAL-TO-ANALOG CONVERTER CIRCUITRY USING GRAY CODE' [patent_app_type] => utility [patent_app_number] => 12/964228 [patent_app_country] => US [patent_app_date] => 2010-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6680 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0156/20110156935.pdf [firstpage_image] =>[orig_patent_app_number] => 12964228 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/964228
Apparatus and method for simplifying Digital-to-Analog Converter circuitry using gray code Dec 8, 2010 Issued
Array ( [id] => 8238091 [patent_doc_number] => 20120146825 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-14 [patent_title] => 'CYCLIC DIGITAL-TO-ANALOG CONVERTER (DAC) WITH CAPACITOR SWAPPING' [patent_app_type] => utility [patent_app_number] => 12/963748 [patent_app_country] => US [patent_app_date] => 2010-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8531 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12963748 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/963748
Cyclic digital-to-analog converter (DAC) with capacitor swapping Dec 8, 2010 Issued
Array ( [id] => 8238094 [patent_doc_number] => 20120146828 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-14 [patent_title] => 'DIGITAL-TO-ANALOG CONVERTER WITH NON-UNIFORM RESOLUTION' [patent_app_type] => utility [patent_app_number] => 12/964607 [patent_app_country] => US [patent_app_date] => 2010-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 13594 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12964607 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/964607
Digital-to-analog converter with non-uniform resolution Dec 8, 2010 Issued
Array ( [id] => 8238097 [patent_doc_number] => 20120146824 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-14 [patent_title] => 'SIGMA-DELTA DIFFERENCE-OF-SQUARES LOG-RMS TO DC CONVERTER WITH FORWARD AND FEEDBACK PATHS SIGNAL SQUARING' [patent_app_type] => utility [patent_app_number] => 12/963198 [patent_app_country] => US [patent_app_date] => 2010-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8188 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12963198 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/963198
ΣΔ difference-of-squares LOG-RMS to DC converter with forward and feedback paths signal squaring Dec 7, 2010 Issued
Array ( [id] => 8238108 [patent_doc_number] => 20120146823 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-14 [patent_title] => 'SIGMA-DELTA DIFFERENCE-OF-SQUARES RMS TO DC CONVERTER WITH MULTIPLE FEEDBACK PATHS' [patent_app_type] => utility [patent_app_number] => 12/962932 [patent_app_country] => US [patent_app_date] => 2010-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 11607 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12962932 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/962932
Σ-Δ difference-of-squares RMS to DC converter with multiple feedback paths Dec 7, 2010 Issued
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