
Lam T. Mai
Examiner (ID: 13914)
| Most Active Art Unit | 2845 |
| Art Unit(s) | 2819, 2845 |
| Total Applications | 2568 |
| Issued Applications | 2446 |
| Pending Applications | 84 |
| Abandoned Applications | 75 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8258380
[patent_doc_number] => 08207882
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2012-06-26
[patent_title] => 'Analog-to-digital converter (ADC) having a folding stage and multiple ADC stages'
[patent_app_type] => utility
[patent_app_number] => 12/963541
[patent_app_country] => US
[patent_app_date] => 2010-12-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3316
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 218
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12963541
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/963541 | Analog-to-digital converter (ADC) having a folding stage and multiple ADC stages | Dec 7, 2010 | Issued |
Array
(
[id] => 8386990
[patent_doc_number] => 08264392
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2012-09-11
[patent_title] => 'Compact high-speed analog-to-digital converter for both I and Q analog to digital conversion'
[patent_app_type] => utility
[patent_app_number] => 12/963347
[patent_app_country] => US
[patent_app_date] => 2010-12-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 8923
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 59
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12963347
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/963347 | Compact high-speed analog-to-digital converter for both I and Q analog to digital conversion | Dec 7, 2010 | Issued |
Array
(
[id] => 8238106
[patent_doc_number] => 20120146819
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-06-14
[patent_title] => 'SIGMA-DELTA DIFFERENCE-OF-SQUARES LOG-RMS TO DC CONVERTER WITH FORWARD PATH MULTIPLIER AND CHOPPER STABILIZATION'
[patent_app_type] => utility
[patent_app_number] => 12/963265
[patent_app_country] => US
[patent_app_date] => 2010-12-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 9244
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12963265
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/963265 | Sigma-delta difference-of-squares log-RMS to DC converter with forward path multiplier and chopper stabilization | Dec 7, 2010 | Issued |
Array
(
[id] => 5973343
[patent_doc_number] => 20110068966
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-03-24
[patent_title] => 'Asynchronous Sigma Delta Analog to Digital Converter Using a Time to Digital Converter'
[patent_app_type] => utility
[patent_app_number] => 12/954858
[patent_app_country] => US
[patent_app_date] => 2010-11-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 7311
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0068/20110068966.pdf
[firstpage_image] =>[orig_patent_app_number] => 12954858
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/954858 | Asynchronous sigma delta analog to digital converter using a time to digital converter | Nov 26, 2010 | Issued |
Array
(
[id] => 8178962
[patent_doc_number] => 08179293
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-05-15
[patent_title] => 'Programmable settling for high speed analog to digital converter'
[patent_app_type] => utility
[patent_app_number] => 12/954024
[patent_app_country] => US
[patent_app_date] => 2010-11-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 8262
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 39
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/179/08179293.pdf
[firstpage_image] =>[orig_patent_app_number] => 12954024
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/954024 | Programmable settling for high speed analog to digital converter | Nov 23, 2010 | Issued |
Array
(
[id] => 7551468
[patent_doc_number] => 08063803
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-11-22
[patent_title] => 'Calibration of offset, gain and phase errors in M-channel time-interleaved analog-to-digital converters'
[patent_app_type] => utility
[patent_app_number] => 12/950751
[patent_app_country] => US
[patent_app_date] => 2010-11-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 32
[patent_figures_cnt] => 35
[patent_no_of_words] => 7192
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 235
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/063/08063803.pdf
[firstpage_image] =>[orig_patent_app_number] => 12950751
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/950751 | Calibration of offset, gain and phase errors in M-channel time-interleaved analog-to-digital converters | Nov 18, 2010 | Issued |
Array
(
[id] => 6109143
[patent_doc_number] => 20110188600
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-08-04
[patent_title] => 'Sequence Transition Point Determining Method and Apparatus Thereof'
[patent_app_type] => utility
[patent_app_number] => 12/946968
[patent_app_country] => US
[patent_app_date] => 2010-11-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3592
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0188/20110188600.pdf
[firstpage_image] =>[orig_patent_app_number] => 12946968
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/946968 | Sequence transition point determining method and apparatus thereof | Nov 15, 2010 | Issued |
Array
(
[id] => 8391347
[patent_doc_number] => 20120229185
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-09-13
[patent_title] => 'Time-to-Digital Converter with Successive Measurements'
[patent_app_type] => utility
[patent_app_number] => 13/509346
[patent_app_country] => US
[patent_app_date] => 2010-11-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5520
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13509346
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/509346 | Time-to-Digital Converter with Successive Measurements | Nov 11, 2010 | Abandoned |
Array
(
[id] => 9324421
[patent_doc_number] => 08659448
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-02-25
[patent_title] => 'Movement detection device'
[patent_app_type] => utility
[patent_app_number] => 13/519436
[patent_app_country] => US
[patent_app_date] => 2010-11-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 24
[patent_no_of_words] => 9095
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 340
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13519436
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/519436 | Movement detection device | Nov 11, 2010 | Issued |
Array
(
[id] => 8653835
[patent_doc_number] => 08373586
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-02-12
[patent_title] => 'Configurable analog input circuit'
[patent_app_type] => utility
[patent_app_number] => 12/942643
[patent_app_country] => US
[patent_app_date] => 2010-11-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 5505
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12942643
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/942643 | Configurable analog input circuit | Nov 8, 2010 | Issued |
Array
(
[id] => 8592859
[patent_doc_number] => 08350736
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-01-08
[patent_title] => 'Offset compensation scheme using a DAC'
[patent_app_type] => utility
[patent_app_number] => 12/939965
[patent_app_country] => US
[patent_app_date] => 2010-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3854
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 41
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12939965
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/939965 | Offset compensation scheme using a DAC | Nov 3, 2010 | Issued |
Array
(
[id] => 10899175
[patent_doc_number] => 08922400
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-12-30
[patent_title] => 'Method for compressing digital values of image, audio and/or video files'
[patent_app_type] => utility
[patent_app_number] => 13/883138
[patent_app_country] => US
[patent_app_date] => 2010-11-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 2304
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 203
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13883138
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/883138 | Method for compressing digital values of image, audio and/or video files | Nov 1, 2010 | Issued |
Array
(
[id] => 7497458
[patent_doc_number] => 20110260898
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-10-27
[patent_title] => 'MISMATCH COMPENSATORS AND METHODS FOR MISMATCH COMPENSATION'
[patent_app_type] => utility
[patent_app_number] => 12/908783
[patent_app_country] => US
[patent_app_date] => 2010-10-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 15082
[patent_no_of_claims] => 45
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0260/20110260898.pdf
[firstpage_image] =>[orig_patent_app_number] => 12908783
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/908783 | Mismatch compensators and methods for mismatch compensation | Oct 19, 2010 | Issued |
Array
(
[id] => 4444397
[patent_doc_number] => 07928874
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-04-19
[patent_title] => 'Analog to digital converter with dynamic power configuration'
[patent_app_type] => utility
[patent_app_number] => 12/906772
[patent_app_country] => US
[patent_app_date] => 2010-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 7119
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/928/07928874.pdf
[firstpage_image] =>[orig_patent_app_number] => 12906772
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/906772 | Analog to digital converter with dynamic power configuration | Oct 17, 2010 | Issued |
Array
(
[id] => 8403786
[patent_doc_number] => 20120235839
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-09-20
[patent_title] => 'Data Interface Circuit'
[patent_app_type] => utility
[patent_app_number] => 13/320368
[patent_app_country] => US
[patent_app_date] => 2010-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 9463
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13320368
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/320368 | Data interface circuit | Oct 17, 2010 | Issued |
Array
(
[id] => 8386988
[patent_doc_number] => 08264391
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-09-11
[patent_title] => 'Area efficient selector circuit'
[patent_app_type] => utility
[patent_app_number] => 12/902493
[patent_app_country] => US
[patent_app_date] => 2010-10-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 5727
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 180
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12902493
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/902493 | Area efficient selector circuit | Oct 11, 2010 | Issued |
Array
(
[id] => 8345355
[patent_doc_number] => 20120206280
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-08-16
[patent_title] => 'Multiple Word Data Bus Inversion'
[patent_app_type] => utility
[patent_app_number] => 13/502474
[patent_app_country] => US
[patent_app_date] => 2010-10-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 7925
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13502474
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/502474 | Multiple word data bus inversion | Oct 7, 2010 | Issued |
Array
(
[id] => 8386986
[patent_doc_number] => 08264388
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2012-09-11
[patent_title] => 'Frequency integrator with digital phase error message for phase-locked loop applications'
[patent_app_type] => utility
[patent_app_number] => 12/899500
[patent_app_country] => US
[patent_app_date] => 2010-10-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 10
[patent_no_of_words] => 3935
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12899500
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/899500 | Frequency integrator with digital phase error message for phase-locked loop applications | Oct 5, 2010 | Issued |
Array
(
[id] => 10877305
[patent_doc_number] => 08902097
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-12-02
[patent_title] => 'Non-linear data acquisition'
[patent_app_type] => utility
[patent_app_number] => 13/876156
[patent_app_country] => US
[patent_app_date] => 2010-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 10525
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 59
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13876156
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/876156 | Non-linear data acquisition | Sep 29, 2010 | Issued |
Array
(
[id] => 5990600
[patent_doc_number] => 20110012770
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-01-20
[patent_title] => 'D/A CONVERTER AND SEMICONDUCTOR INTEGRATED CIRCUIT INCLUDING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/887969
[patent_app_country] => US
[patent_app_date] => 2010-09-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 13325
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0012/20110012770.pdf
[firstpage_image] =>[orig_patent_app_number] => 12887969
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/887969 | D/A converter and semiconductor integrated circuit including the same | Sep 21, 2010 | Issued |