Search

Lamarr A. Brown

Examiner (ID: 14417)

Most Active Art Unit
2858
Art Unit(s)
2858
Total Applications
232
Issued Applications
182
Pending Applications
0
Abandoned Applications
50

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5133675 [patent_doc_number] => 20070075304 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-05 [patent_title] => 'Reduced current phase-change memory device' [patent_app_type] => utility [patent_app_number] => 11/440236 [patent_app_country] => US [patent_app_date] => 2006-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3085 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0075/20070075304.pdf [firstpage_image] =>[orig_patent_app_number] => 11440236 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/440236
Reduced current phase-change memory device May 23, 2006 Issued
Array ( [id] => 5082914 [patent_doc_number] => 20070272965 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-29 [patent_title] => 'Method for producing a dielectric interlayer and storage capacitor with such a dielectric interlayer' [patent_app_type] => utility [patent_app_number] => 11/438700 [patent_app_country] => US [patent_app_date] => 2006-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5485 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0272/20070272965.pdf [firstpage_image] =>[orig_patent_app_number] => 11438700 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/438700
Method for producing a dielectric interlayer and storage capacitor with such a dielectric interlayer May 22, 2006 Issued
Array ( [id] => 5659196 [patent_doc_number] => 20060249792 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-09 [patent_title] => 'Electrostatic discharge protection circuit and integrated circuit having the same' [patent_app_type] => utility [patent_app_number] => 11/415040 [patent_app_country] => US [patent_app_date] => 2006-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7953 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0249/20060249792.pdf [firstpage_image] =>[orig_patent_app_number] => 11415040 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/415040
Electrostatic discharge protection circuit and integrated circuit having the same Apr 30, 2006 Abandoned
Array ( [id] => 5168799 [patent_doc_number] => 20070069230 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-29 [patent_title] => 'Light-emitting diode and light source device having same' [patent_app_type] => utility [patent_app_number] => 11/413250 [patent_app_country] => US [patent_app_date] => 2006-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1873 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0069/20070069230.pdf [firstpage_image] =>[orig_patent_app_number] => 11413250 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/413250
Light-emitting diode and light source device having same Apr 27, 2006 Abandoned
Array ( [id] => 5222916 [patent_doc_number] => 20070252182 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-01 [patent_title] => 'Buried-gated photodiode device and method for configuring and operating same' [patent_app_type] => utility [patent_app_number] => 11/412280 [patent_app_country] => US [patent_app_date] => 2006-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3369 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0252/20070252182.pdf [firstpage_image] =>[orig_patent_app_number] => 11412280 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/412280
Buried-gated photodiode device and method for configuring and operating same Apr 26, 2006 Issued
Array ( [id] => 5126013 [patent_doc_number] => 20070238284 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-11 [patent_title] => 'Touch panel fabrication method' [patent_app_type] => utility [patent_app_number] => 11/392590 [patent_app_country] => US [patent_app_date] => 2006-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2055 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0238/20070238284.pdf [firstpage_image] =>[orig_patent_app_number] => 11392590 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/392590
Touch panel fabrication method Mar 29, 2006 Abandoned
Array ( [id] => 5667101 [patent_doc_number] => 20060172451 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-03 [patent_title] => 'Image sensor and related method of fabrication' [patent_app_type] => utility [patent_app_number] => 11/334570 [patent_app_country] => US [patent_app_date] => 2006-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2781 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0172/20060172451.pdf [firstpage_image] =>[orig_patent_app_number] => 11334570 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/334570
Image sensor and related method of fabrication Jan 18, 2006 Issued
Array ( [id] => 151273 [patent_doc_number] => 07682866 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-23 [patent_title] => 'Non-planarized, self-aligned, non-volatile phase-change memory array and method of formation' [patent_app_type] => utility [patent_app_number] => 11/335329 [patent_app_country] => US [patent_app_date] => 2006-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 4510 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/682/07682866.pdf [firstpage_image] =>[orig_patent_app_number] => 11335329 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/335329
Non-planarized, self-aligned, non-volatile phase-change memory array and method of formation Jan 18, 2006 Issued
Array ( [id] => 5186016 [patent_doc_number] => 20070164323 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-19 [patent_title] => 'CMOS gates with intermetallic compound tunable work functions' [patent_app_type] => utility [patent_app_number] => 11/333910 [patent_app_country] => US [patent_app_date] => 2006-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5635 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20070164323.pdf [firstpage_image] =>[orig_patent_app_number] => 11333910 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/333910
CMOS gates with intermetallic compound tunable work functions Jan 17, 2006 Abandoned
Array ( [id] => 4988780 [patent_doc_number] => 20070155119 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-05 [patent_title] => 'Method of manufacturing a field effect transistor device with recessed channel and corner gate device' [patent_app_type] => utility [patent_app_number] => 11/321450 [patent_app_country] => US [patent_app_date] => 2005-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 6556 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0155/20070155119.pdf [firstpage_image] =>[orig_patent_app_number] => 11321450 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/321450
Method of manufacturing a field effect transistor device with recessed channel and corner gate device Dec 29, 2005 Issued
Array ( [id] => 5056980 [patent_doc_number] => 20070059902 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-15 [patent_title] => 'Method for manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/320740 [patent_app_country] => US [patent_app_date] => 2005-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1896 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20070059902.pdf [firstpage_image] =>[orig_patent_app_number] => 11320740 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/320740
Method for manufacturing semiconductor device Dec 29, 2005 Abandoned
Array ( [id] => 4982959 [patent_doc_number] => 20070087517 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-19 [patent_title] => 'Method of manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/319710 [patent_app_country] => US [patent_app_date] => 2005-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1475 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0087/20070087517.pdf [firstpage_image] =>[orig_patent_app_number] => 11319710 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/319710
Method of forming shallow trench isolation Dec 28, 2005 Issued
Array ( [id] => 5631734 [patent_doc_number] => 20060148204 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-06 [patent_title] => 'Monitoring pattern for optimization of chemical mechanical polishing process of trench isolation layer and related methods' [patent_app_type] => utility [patent_app_number] => 11/324170 [patent_app_country] => US [patent_app_date] => 2005-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2406 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0148/20060148204.pdf [firstpage_image] =>[orig_patent_app_number] => 11324170 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/324170
Monitoring pattern for optimization of chemical mechanical polishing process of trench isolation layer and related methods Dec 28, 2005 Abandoned
Array ( [id] => 5869122 [patent_doc_number] => 20060163739 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-27 [patent_title] => 'Semiconductor device and method for production thereof' [patent_app_type] => utility [patent_app_number] => 11/321850 [patent_app_country] => US [patent_app_date] => 2005-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4319 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0163/20060163739.pdf [firstpage_image] =>[orig_patent_app_number] => 11321850 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/321850
Semiconductor device and method for production thereof Dec 28, 2005 Abandoned
Array ( [id] => 5869007 [patent_doc_number] => 20060163624 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-27 [patent_title] => 'Semiconductor device, and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 11/319740 [patent_app_country] => US [patent_app_date] => 2005-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9692 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0163/20060163624.pdf [firstpage_image] =>[orig_patent_app_number] => 11319740 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/319740
Semiconductor device, and manufacturing method thereof Dec 28, 2005 Abandoned
Array ( [id] => 256302 [patent_doc_number] => 07575975 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-08-18 [patent_title] => 'Method for forming a planar and vertical semiconductor structure having a strained semiconductor layer' [patent_app_type] => utility [patent_app_number] => 11/263120 [patent_app_country] => US [patent_app_date] => 2005-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 5054 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 276 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/575/07575975.pdf [firstpage_image] =>[orig_patent_app_number] => 11263120 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/263120
Method for forming a planar and vertical semiconductor structure having a strained semiconductor layer Oct 30, 2005 Issued
Array ( [id] => 5878058 [patent_doc_number] => 20060027864 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-09 [patent_title] => 'Semiconductor device and method for fabricating such device' [patent_app_type] => utility [patent_app_number] => 11/244050 [patent_app_country] => US [patent_app_date] => 2005-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 29616 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20060027864.pdf [firstpage_image] =>[orig_patent_app_number] => 11244050 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/244050
Semiconductor device and method for fabricating such device Oct 5, 2005 Abandoned
Array ( [id] => 5718576 [patent_doc_number] => 20060071349 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-06 [patent_title] => 'Semiconductor device and semiconductor device unit' [patent_app_type] => utility [patent_app_number] => 11/242870 [patent_app_country] => US [patent_app_date] => 2005-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5202 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0071/20060071349.pdf [firstpage_image] =>[orig_patent_app_number] => 11242870 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/242870
Semiconductor device and semiconductor device unit Oct 4, 2005 Abandoned
Array ( [id] => 4907234 [patent_doc_number] => 20080018000 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-24 [patent_title] => 'Method and apparatus for precisely aligning integrated circuit chips' [patent_app_type] => utility [patent_app_number] => 11/243300 [patent_app_country] => US [patent_app_date] => 2005-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4534 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0018/20080018000.pdf [firstpage_image] =>[orig_patent_app_number] => 11243300 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/243300
Method and apparatus for precisely aligning integrated circuit chips Oct 2, 2005 Issued
Array ( [id] => 142605 [patent_doc_number] => 07687838 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-30 [patent_title] => 'Resistive memory device having array of probes and method of manufacturing the resistive memory device' [patent_app_type] => utility [patent_app_number] => 11/240570 [patent_app_country] => US [patent_app_date] => 2005-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 5013 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/687/07687838.pdf [firstpage_image] =>[orig_patent_app_number] => 11240570 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/240570
Resistive memory device having array of probes and method of manufacturing the resistive memory device Oct 2, 2005 Issued
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