Search

Lamont B. Koo

Examiner (ID: 647, Phone: (571)272-0984 , Office: P/2823 )

Most Active Art Unit
2813
Art Unit(s)
2823, 2813
Total Applications
628
Issued Applications
465
Pending Applications
72
Abandoned Applications
107

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19484045 [patent_doc_number] => 20240332087 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/739286 [patent_app_country] => US [patent_app_date] => 2024-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3206 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18739286 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/739286
SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME Jun 9, 2024 Pending
Array ( [id] => 19875139 [patent_doc_number] => 12268025 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-04-01 [patent_title] => ALEFT-ISD-LTSEE{Advanced Low Electrostatic Field Transistor using Implanted S/D and Low Temperature Selective Epitaxial Extension} [patent_app_type] => utility [patent_app_number] => 18/663423 [patent_app_country] => US [patent_app_date] => 2024-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3208 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18663423 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/663423
ALEFT-ISD-LTSEE{Advanced Low Electrostatic Field Transistor using Implanted S/D and Low Temperature Selective Epitaxial Extension} May 13, 2024 Issued
Array ( [id] => 19409139 [patent_doc_number] => 20240292650 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 18/656819 [patent_app_country] => US [patent_app_date] => 2024-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17705 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18656819 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/656819
ELECTRONIC DEVICE May 6, 2024 Pending
Array ( [id] => 19392946 [patent_doc_number] => 20240282816 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => NANOSHEET FIELD-EFFECT TRANSISTOR DEVICE AND METHOD OF FORMING [patent_app_type] => utility [patent_app_number] => 18/654298 [patent_app_country] => US [patent_app_date] => 2024-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10148 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18654298 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/654298
NANOSHEET FIELD-EFFECT TRANSISTOR DEVICE AND METHOD OF FORMING May 2, 2024 Pending
Array ( [id] => 19407325 [patent_doc_number] => 20240290836 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => Gate Structures For Semiconductor Devices [patent_app_type] => utility [patent_app_number] => 18/650905 [patent_app_country] => US [patent_app_date] => 2024-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7407 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18650905 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/650905
Gate Structures For Semiconductor Devices Apr 29, 2024 Pending
Array ( [id] => 19364190 [patent_doc_number] => 20240266224 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => GATE SPACERS AND METHODS OF FORMING THE SAME IN SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 18/639739 [patent_app_country] => US [patent_app_date] => 2024-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6650 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18639739 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/639739
GATE SPACERS AND METHODS OF FORMING THE SAME IN SEMICONDUCTOR DEVICES Apr 17, 2024 Pending
Array ( [id] => 19349355 [patent_doc_number] => 20240258319 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => SEMICONDUCTOR DEVICE WITH IMPROVED DEVICE PERFORMANCE [patent_app_type] => utility [patent_app_number] => 18/630021 [patent_app_country] => US [patent_app_date] => 2024-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24220 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18630021 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/630021
SEMICONDUCTOR DEVICE WITH IMPROVED DEVICE PERFORMANCE Apr 8, 2024 Pending
Array ( [id] => 19973922 [patent_doc_number] => 12342555 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-06-24 [patent_title] => Bipolar transistor [patent_app_type] => utility [patent_app_number] => 18/626720 [patent_app_country] => US [patent_app_date] => 2024-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 0 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18626720 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/626720
Bipolar transistor Apr 3, 2024 Issued
Array ( [id] => 19286086 [patent_doc_number] => 20240222564 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => LIGHT EMITTING DIODE HAVING SHALLOW VIEWING ANGLE [patent_app_type] => utility [patent_app_number] => 18/608508 [patent_app_country] => US [patent_app_date] => 2024-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13941 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18608508 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/608508
LIGHT EMITTING DIODE HAVING SHALLOW VIEWING ANGLE Mar 17, 2024 Pending
Array ( [id] => 19305840 [patent_doc_number] => 20240234420 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/443917 [patent_app_country] => US [patent_app_date] => 2024-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21879 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18443917 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/443917
SEMICONDUCTOR DEVICE Feb 15, 2024 Pending
Array ( [id] => 19414813 [patent_doc_number] => 12080650 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-09-03 [patent_title] => Interconnect structure with low capacitance and high thermal conductivity [patent_app_type] => utility [patent_app_number] => 18/544100 [patent_app_country] => US [patent_app_date] => 2023-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 6659 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18544100 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/544100
Interconnect structure with low capacitance and high thermal conductivity Dec 17, 2023 Issued
Array ( [id] => 19087879 [patent_doc_number] => 20240114680 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => Integrated Assemblies and Semiconductor Memory Devices [patent_app_type] => utility [patent_app_number] => 18/533410 [patent_app_country] => US [patent_app_date] => 2023-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6889 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18533410 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/533410
Integrated Assemblies and Semiconductor Memory Devices Dec 7, 2023 Pending
Array ( [id] => 19454904 [patent_doc_number] => 20240315034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/507258 [patent_app_country] => US [patent_app_date] => 2023-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19474 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18507258 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/507258
SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME Nov 12, 2023 Pending
Array ( [id] => 19023292 [patent_doc_number] => 20240079463 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-07 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/506245 [patent_app_country] => US [patent_app_date] => 2023-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15214 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18506245 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/506245
SEMICONDUCTOR DEVICE Nov 9, 2023 Pending
Array ( [id] => 20021696 [patent_doc_number] => 20250159918 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-15 [patent_title] => GATE ISOLATION FEATURES [patent_app_type] => utility [patent_app_number] => 18/505632 [patent_app_country] => US [patent_app_date] => 2023-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6904 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18505632 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/505632
GATE ISOLATION FEATURES Nov 8, 2023 Pending
Array ( [id] => 19269530 [patent_doc_number] => 20240213234 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-27 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/505682 [patent_app_country] => US [patent_app_date] => 2023-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21520 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18505682 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/505682
DISPLAY DEVICE Nov 8, 2023 Pending
Array ( [id] => 19161176 [patent_doc_number] => 20240153883 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-09 [patent_title] => DEVICE INCLUDING OVERLAY TARGET STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/387729 [patent_app_country] => US [patent_app_date] => 2023-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8421 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18387729 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/387729
DEVICE INCLUDING OVERLAY TARGET STRUCTURE Nov 6, 2023 Pending
Array ( [id] => 19023238 [patent_doc_number] => 20240079409 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-07 [patent_title] => SEMICONDUCTOR DEVICE STRUCTURE WITH CONDUCTIVE VIA STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/502297 [patent_app_country] => US [patent_app_date] => 2023-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7951 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18502297 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/502297
SEMICONDUCTOR DEVICE STRUCTURE WITH CONDUCTIVE VIA STRUCTURE Nov 5, 2023 Pending
Array ( [id] => 19484389 [patent_doc_number] => 20240332431 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING ESD DIODE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/497363 [patent_app_country] => US [patent_app_date] => 2023-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15468 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18497363 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/497363
SEMICONDUCTOR DEVICE INCLUDING ESD DIODE AND METHOD FOR MANUFACTURING THE SAME Oct 29, 2023 Pending
Array ( [id] => 19146506 [patent_doc_number] => 20240145536 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-02 [patent_title] => SEMICONDUCTOR DEVICE STRUCTURE WITH VERTICAL TRANSISTOR OVER UNDERGROUND BIT LINE [patent_app_type] => utility [patent_app_number] => 18/494783 [patent_app_country] => US [patent_app_date] => 2023-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7699 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18494783 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/494783
SEMICONDUCTOR DEVICE STRUCTURE WITH VERTICAL TRANSISTOR OVER UNDERGROUND BIT LINE Oct 25, 2023 Pending
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