
Lan Vinh
Examiner (ID: 7200)
| Most Active Art Unit | 1713 |
| Art Unit(s) | 1765, 1713, 1792 |
| Total Applications | 1662 |
| Issued Applications | 1401 |
| Pending Applications | 46 |
| Abandoned Applications | 218 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 11974566
[patent_doc_number] => 20170278720
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-09-28
[patent_title] => 'METHOD OF FORMING A PATTERN FOR INTERCONNECTION LINES AND ASSOCIATED CONTINUITY BLOCKS IN AN INTEGRATED CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 15/077480
[patent_app_country] => US
[patent_app_date] => 2016-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 5494
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15077480
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/077480 | Method of forming a pattern for interconnection lines and associated continuity blocks in an integrated circuit | Mar 21, 2016 | Issued |
Array
(
[id] => 11952263
[patent_doc_number] => 20170256414
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-09-07
[patent_title] => 'Asymmetric Application of Pressure to a Wafer During a CMP Process'
[patent_app_type] => utility
[patent_app_number] => 15/058956
[patent_app_country] => US
[patent_app_date] => 2016-03-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4904
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15058956
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/058956 | Asymmetric application of pressure to a wafer during a CMP process | Mar 1, 2016 | Issued |
Array
(
[id] => 11246423
[patent_doc_number] => 09472471
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-10-18
[patent_title] => 'Hybrid orientation vertically stacked III-V and Ge gate-all-around CMOS'
[patent_app_type] => utility
[patent_app_number] => 15/057299
[patent_app_country] => US
[patent_app_date] => 2016-03-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 1022
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 237
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15057299
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/057299 | Hybrid orientation vertically stacked III-V and Ge gate-all-around CMOS | Feb 29, 2016 | Issued |
Array
(
[id] => 12185877
[patent_doc_number] => 20180044813
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-02-15
[patent_title] => 'Inhibitor Composition for Racks When Using Chrome Free Etches in a Plating on Plastics Process'
[patent_app_type] => utility
[patent_app_number] => 15/551052
[patent_app_country] => US
[patent_app_date] => 2016-02-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3582
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15551052
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/551052 | Inhibitor Composition for Racks When Using Chrome Free Etches in a Plating on Plastics Process | Feb 22, 2016 | Abandoned |
Array
(
[id] => 13653617
[patent_doc_number] => 09853130
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-12-26
[patent_title] => Method of modifying the strain state of a semiconducting structure with stacked transistor channels
[patent_app_type] => utility
[patent_app_number] => 15/049468
[patent_app_country] => US
[patent_app_date] => 2016-02-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 20
[patent_no_of_words] => 4427
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 197
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15049468
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/049468 | Method of modifying the strain state of a semiconducting structure with stacked transistor channels | Feb 21, 2016 | Issued |
Array
(
[id] => 11854825
[patent_doc_number] => 20170229317
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-08-10
[patent_title] => 'CHAMBER FOR PATTERNING NON-VOLATILE METALS'
[patent_app_type] => utility
[patent_app_number] => 15/017444
[patent_app_country] => US
[patent_app_date] => 2016-02-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 11134
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15017444
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/017444 | Chamber for patterning non-volatile metals | Feb 4, 2016 | Issued |
Array
(
[id] => 12162372
[patent_doc_number] => 20180033638
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-02-01
[patent_title] => 'METHOD FOR WET ETCHING OF BLOCK COPOLYMER SELF-ASSEMBLY PATTERN'
[patent_app_type] => utility
[patent_app_number] => 15/547688
[patent_app_country] => US
[patent_app_date] => 2016-02-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3654
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15547688
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/547688 | Method for wet etching of block copolymer self-assembly pattern | Feb 1, 2016 | Issued |
Array
(
[id] => 12037957
[patent_doc_number] => 09816180
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-11-14
[patent_title] => 'Selective deposition'
[patent_app_type] => utility
[patent_app_number] => 15/013637
[patent_app_country] => US
[patent_app_date] => 2016-02-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 15064
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15013637
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/013637 | Selective deposition | Feb 1, 2016 | Issued |
Array
(
[id] => 11028667
[patent_doc_number] => 20160225623
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-08-04
[patent_title] => 'METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/008529
[patent_app_country] => US
[patent_app_date] => 2016-01-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 45
[patent_figures_cnt] => 45
[patent_no_of_words] => 11925
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15008529
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/008529 | Method for manufacturing semiconductor device | Jan 27, 2016 | Issued |
Array
(
[id] => 10809471
[patent_doc_number] => 20160155630
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-06-02
[patent_title] => 'SUBSTRATE PROCESSING APPARATUS, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, AND RECORDING MEDIUM'
[patent_app_type] => utility
[patent_app_number] => 15/007513
[patent_app_country] => US
[patent_app_date] => 2016-01-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 10484
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15007513
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/007513 | SUBSTRATE PROCESSING APPARATUS, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, AND RECORDING MEDIUM | Jan 26, 2016 | Abandoned |
Array
(
[id] => 12214793
[patent_doc_number] => 09911608
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-03-06
[patent_title] => 'Method of forming patterns'
[patent_app_type] => utility
[patent_app_number] => 15/006134
[patent_app_country] => US
[patent_app_date] => 2016-01-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 3595
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 171
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15006134
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/006134 | Method of forming patterns | Jan 25, 2016 | Issued |
Array
(
[id] => 11847503
[patent_doc_number] => 09735060
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-08-15
[patent_title] => 'Hybrid fin cut etching processes for products comprising tapered and non-tapered FinFET semiconductor devices'
[patent_app_type] => utility
[patent_app_number] => 15/006304
[patent_app_country] => US
[patent_app_date] => 2016-01-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 33
[patent_figures_cnt] => 45
[patent_no_of_words] => 10148
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 252
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15006304
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/006304 | Hybrid fin cut etching processes for products comprising tapered and non-tapered FinFET semiconductor devices | Jan 25, 2016 | Issued |
Array
(
[id] => 12147546
[patent_doc_number] => 09881804
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-01-30
[patent_title] => 'Method and system for high precision etching of substrates'
[patent_app_type] => utility
[patent_app_number] => 15/006739
[patent_app_country] => US
[patent_app_date] => 2016-01-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 13706
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15006739
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/006739 | Method and system for high precision etching of substrates | Jan 25, 2016 | Issued |
Array
(
[id] => 11062236
[patent_doc_number] => 20160259198
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-09-08
[patent_title] => 'METHOD FOR MANUFACTURING LIQUID CRYSTAL LENS'
[patent_app_type] => utility
[patent_app_number] => 14/995999
[patent_app_country] => US
[patent_app_date] => 2016-01-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 7445
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14995999
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/995999 | Method for manufacturing liquid crystal lens | Jan 13, 2016 | Issued |
Array
(
[id] => 11751883
[patent_doc_number] => 09709893
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-07-18
[patent_title] => 'Exposure method using electron beam and substrate manufacturing method using the same'
[patent_app_type] => utility
[patent_app_number] => 14/990818
[patent_app_country] => US
[patent_app_date] => 2016-01-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 31
[patent_no_of_words] => 8419
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 221
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14990818
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/990818 | Exposure method using electron beam and substrate manufacturing method using the same | Jan 7, 2016 | Issued |
Array
(
[id] => 11109305
[patent_doc_number] => 20160306275
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-10-20
[patent_title] => 'IMPRINT LITHOGRAPHY METHOD, METHOD FOR MANUFACTURING MASTER TEMPLATE USING THE METHOD AND MASTER TEMPLATE MANUFACTURED BY THE METHOD'
[patent_app_type] => utility
[patent_app_number] => 14/991828
[patent_app_country] => US
[patent_app_date] => 2016-01-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 11374
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14991828
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/991828 | Imprint lithography method, method for manufacturing master template using the method and master template manufactured by the method | Jan 7, 2016 | Issued |
Array
(
[id] => 11315307
[patent_doc_number] => 20160351417
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-12-01
[patent_title] => 'SUBSTRATE TREATMENT METHOD AND SUBSTRATE TREATMENT APPARATUS'
[patent_app_type] => utility
[patent_app_number] => 14/989241
[patent_app_country] => US
[patent_app_date] => 2016-01-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2431
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14989241
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/989241 | Substrate treatment method and substrate treatment apparatus | Jan 5, 2016 | Issued |
Array
(
[id] => 11698196
[patent_doc_number] => 09688094
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-06-27
[patent_title] => 'Method for cutting substrate'
[patent_app_type] => utility
[patent_app_number] => 14/986973
[patent_app_country] => US
[patent_app_date] => 2016-01-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6496
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 301
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14986973
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/986973 | Method for cutting substrate | Jan 3, 2016 | Issued |
Array
(
[id] => 11931247
[patent_doc_number] => 09798241
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-10-24
[patent_title] => 'Methods of manufacturing photomasks, methods of forming photoresist patterns and methods of manufacturing semiconductor devices'
[patent_app_type] => utility
[patent_app_number] => 14/983851
[patent_app_country] => US
[patent_app_date] => 2015-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 49
[patent_no_of_words] => 11896
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14983851
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/983851 | Methods of manufacturing photomasks, methods of forming photoresist patterns and methods of manufacturing semiconductor devices | Dec 29, 2015 | Issued |
Array
(
[id] => 10979812
[patent_doc_number] => 20160176755
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-06-23
[patent_title] => 'TRANSFER OF MONOLAYER GRAPHENE ONTO FLEXIBLE GLASS SUBSTRATES'
[patent_app_type] => utility
[patent_app_number] => 14/971163
[patent_app_country] => US
[patent_app_date] => 2015-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5131
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14971163
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/971163 | Transfer of monolayer graphene onto flexible glass substrates | Dec 15, 2015 | Issued |