Search

Lan Vinh

Examiner (ID: 2362, Phone: (571)272-1471 , Office: P/1713 )

Most Active Art Unit
1713
Art Unit(s)
1765, 1792, 1713
Total Applications
1662
Issued Applications
1401
Pending Applications
46
Abandoned Applications
218

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6607669 [patent_doc_number] => 20030209519 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-13 [patent_title] => 'Layer-by-layer etching apparatus using neutral beam and method of etching using the same' [patent_app_type] => new [patent_app_number] => 10/442566 [patent_app_country] => US [patent_app_date] => 2003-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5016 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0209/20030209519.pdf [firstpage_image] =>[orig_patent_app_number] => 10442566 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/442566
Layer-by-layer etching apparatus using neutral beam and method of etching using the same May 20, 2003 Issued
Array ( [id] => 773541 [patent_doc_number] => 07001846 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-02-21 [patent_title] => 'High-density SOI cross-point memory array and method for fabricating same' [patent_app_type] => utility [patent_app_number] => 10/441378 [patent_app_country] => US [patent_app_date] => 2003-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 18 [patent_no_of_words] => 3789 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/001/07001846.pdf [firstpage_image] =>[orig_patent_app_number] => 10441378 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/441378
High-density SOI cross-point memory array and method for fabricating same May 19, 2003 Issued
Array ( [id] => 6725260 [patent_doc_number] => 20030207572 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-06 [patent_title] => 'Semiconductor device and its manufacturing method' [patent_app_type] => new [patent_app_number] => 10/437916 [patent_app_country] => US [patent_app_date] => 2003-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 5504 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0207/20030207572.pdf [firstpage_image] =>[orig_patent_app_number] => 10437916 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/437916
Manufacturing method of a semiconductor device May 14, 2003 Issued
Array ( [id] => 7317980 [patent_doc_number] => 20040224524 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-11 [patent_title] => 'Maintaining the dimensions of features being etched on a lithographic mask' [patent_app_type] => new [patent_app_number] => 10/435114 [patent_app_country] => US [patent_app_date] => 2003-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6175 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0224/20040224524.pdf [firstpage_image] =>[orig_patent_app_number] => 10435114 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/435114
Maintaining the dimensions of features being etched on a lithographic mask May 8, 2003 Abandoned
Array ( [id] => 701574 [patent_doc_number] => 07064073 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-06-20 [patent_title] => 'Technique for reducing contaminants in fabrication of semiconductor wafers' [patent_app_type] => utility [patent_app_number] => 10/434961 [patent_app_country] => US [patent_app_date] => 2003-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2032 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/064/07064073.pdf [firstpage_image] =>[orig_patent_app_number] => 10434961 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/434961
Technique for reducing contaminants in fabrication of semiconductor wafers May 8, 2003 Issued
Array ( [id] => 7317947 [patent_doc_number] => 20040224509 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-11 [patent_title] => 'Method to remove copper without pattern density effect' [patent_app_type] => new [patent_app_number] => 10/434741 [patent_app_country] => US [patent_app_date] => 2003-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2263 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0224/20040224509.pdf [firstpage_image] =>[orig_patent_app_number] => 10434741 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/434741
Method to remove copper without pattern density effect May 7, 2003 Issued
Array ( [id] => 7355428 [patent_doc_number] => 20040003897 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-08 [patent_title] => 'Plasma stabilization method and plasma apparatus' [patent_app_type] => new [patent_app_number] => 10/427474 [patent_app_country] => US [patent_app_date] => 2003-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4445 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0003/20040003897.pdf [firstpage_image] =>[orig_patent_app_number] => 10427474 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/427474
Plasma stabilization method and plasma apparatus Apr 29, 2003 Issued
Array ( [id] => 6730363 [patent_doc_number] => 20030186553 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-02 [patent_title] => 'Process and device for cleaning a semiconductor wafer' [patent_app_type] => new [patent_app_number] => 10/424173 [patent_app_country] => US [patent_app_date] => 2003-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3067 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0186/20030186553.pdf [firstpage_image] =>[orig_patent_app_number] => 10424173 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/424173
Process and device for cleaning a semiconductor wafer Apr 24, 2003 Issued
Array ( [id] => 6874577 [patent_doc_number] => 20030194874 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-16 [patent_title] => 'Etching method' [patent_app_type] => new [patent_app_number] => 10/410141 [patent_app_country] => US [patent_app_date] => 2003-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7307 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0194/20030194874.pdf [firstpage_image] =>[orig_patent_app_number] => 10410141 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/410141
Etching method Apr 8, 2003 Issued
Array ( [id] => 993647 [patent_doc_number] => 06916746 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-07-12 [patent_title] => 'Method for plasma etching using periodic modulation of gas chemistry' [patent_app_type] => utility [patent_app_number] => 10/411520 [patent_app_country] => US [patent_app_date] => 2003-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 30 [patent_no_of_words] => 11435 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/916/06916746.pdf [firstpage_image] =>[orig_patent_app_number] => 10411520 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/411520
Method for plasma etching using periodic modulation of gas chemistry Apr 8, 2003 Issued
Array ( [id] => 7365346 [patent_doc_number] => 20040092116 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-13 [patent_title] => 'Method for fabricating a floating gate of flash rom' [patent_app_type] => new [patent_app_number] => 10/409226 [patent_app_country] => US [patent_app_date] => 2003-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3655 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0092/20040092116.pdf [firstpage_image] =>[orig_patent_app_number] => 10409226 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/409226
Method for fabricating a floating gate of flash rom Apr 7, 2003 Issued
Array ( [id] => 446194 [patent_doc_number] => 07253117 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-08-07 [patent_title] => 'Methods for use of pulsed voltage in a plasma reactor' [patent_app_type] => utility [patent_app_number] => 10/408542 [patent_app_country] => US [patent_app_date] => 2003-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3673 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/253/07253117.pdf [firstpage_image] =>[orig_patent_app_number] => 10408542 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/408542
Methods for use of pulsed voltage in a plasma reactor Apr 6, 2003 Issued
Array ( [id] => 7462780 [patent_doc_number] => 20040198058 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-07 [patent_title] => 'Methods of forming field effect transistor gates' [patent_app_type] => new [patent_app_number] => 10/406916 [patent_app_country] => US [patent_app_date] => 2003-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2593 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0198/20040198058.pdf [firstpage_image] =>[orig_patent_app_number] => 10406916 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/406916
Methods of forming field effect transistor gates Apr 3, 2003 Issued
Array ( [id] => 690604 [patent_doc_number] => 07074721 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-11 [patent_title] => 'Method for forming thick copper self-aligned dual damascene' [patent_app_type] => utility [patent_app_number] => 10/407082 [patent_app_country] => US [patent_app_date] => 2003-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 3080 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 20 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/074/07074721.pdf [firstpage_image] =>[orig_patent_app_number] => 10407082 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/407082
Method for forming thick copper self-aligned dual damascene Apr 2, 2003 Issued
Array ( [id] => 6663861 [patent_doc_number] => 20030203187 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-30 [patent_title] => 'Manufacture of masks and electronic parts' [patent_app_type] => new [patent_app_number] => 10/405403 [patent_app_country] => US [patent_app_date] => 2003-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5797 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0203/20030203187.pdf [firstpage_image] =>[orig_patent_app_number] => 10405403 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/405403
Manufacture of masks and electronic parts Apr 1, 2003 Issued
Array ( [id] => 679790 [patent_doc_number] => 07084067 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-01 [patent_title] => 'Removal of copper oxides from integrated interconnects' [patent_app_type] => utility [patent_app_number] => 10/404396 [patent_app_country] => US [patent_app_date] => 2003-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 3256 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/084/07084067.pdf [firstpage_image] =>[orig_patent_app_number] => 10404396 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/404396
Removal of copper oxides from integrated interconnects Mar 30, 2003 Issued
Array ( [id] => 6730359 [patent_doc_number] => 20030186549 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-02 [patent_title] => 'Endpoint control for small open area by RF source parameter Vdc' [patent_app_type] => new [patent_app_number] => 10/397818 [patent_app_country] => US [patent_app_date] => 2003-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2881 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0186/20030186549.pdf [firstpage_image] =>[orig_patent_app_number] => 10397818 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/397818
Endpoint control for small open area by RF source parameter Vdc Mar 25, 2003 Abandoned
Array ( [id] => 7309335 [patent_doc_number] => 20040142564 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-22 [patent_title] => 'Removal of CMP and post-CMP residue from semiconductors using supercritical carbon dioxide process' [patent_app_type] => new [patent_app_number] => 10/396612 [patent_app_country] => US [patent_app_date] => 2003-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4216 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0142/20040142564.pdf [firstpage_image] =>[orig_patent_app_number] => 10396612 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/396612
Removal of CMP and post-CMP residue from semiconductors using supercritical carbon dioxide process Mar 23, 2003 Issued
Array ( [id] => 934033 [patent_doc_number] => 06977228 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-12-20 [patent_title] => 'Semiconductor device using damascene technique and manufacturing method therefor' [patent_app_type] => utility [patent_app_number] => 10/388495 [patent_app_country] => US [patent_app_date] => 2003-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 72 [patent_no_of_words] => 10154 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/977/06977228.pdf [firstpage_image] =>[orig_patent_app_number] => 10388495 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/388495
Semiconductor device using damascene technique and manufacturing method therefor Mar 16, 2003 Issued
Array ( [id] => 7673231 [patent_doc_number] => 20040180548 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-16 [patent_title] => 'Dual trench alternating phase shift mask fabrication' [patent_app_type] => new [patent_app_number] => 10/385764 [patent_app_country] => US [patent_app_date] => 2003-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 4136 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0180/20040180548.pdf [firstpage_image] =>[orig_patent_app_number] => 10385764 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/385764
Dual trench alternating phase shift mask fabrication Mar 10, 2003 Issued
Menu