Search

Lan Vinh

Examiner (ID: 2362, Phone: (571)272-1471 , Office: P/1713 )

Most Active Art Unit
1713
Art Unit(s)
1765, 1792, 1713
Total Applications
1662
Issued Applications
1401
Pending Applications
46
Abandoned Applications
218

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1043715 [patent_doc_number] => 06867148 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-15 [patent_title] => 'Removal of organic material in integrated circuit fabrication using ozonated organic acid solutions' [patent_app_type] => utility [patent_app_number] => 09/858980 [patent_app_country] => US [patent_app_date] => 2001-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3947 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/867/06867148.pdf [firstpage_image] =>[orig_patent_app_number] => 09858980 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/858980
Removal of organic material in integrated circuit fabrication using ozonated organic acid solutions May 15, 2001 Issued
Array ( [id] => 5986515 [patent_doc_number] => 20020098707 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-25 [patent_title] => 'Design of lithography alignment and overlay measurement marks on CMP finished damascene surface' [patent_app_type] => new [patent_app_number] => 09/854760 [patent_app_country] => US [patent_app_date] => 2001-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3135 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0098/20020098707.pdf [firstpage_image] =>[orig_patent_app_number] => 09854760 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/854760
Design of lithography alignment and overlay measurement marks on CMP finished damascene surface May 13, 2001 Issued
09/845894 Lens arrays and methods of making the lens array Apr 29, 2001 Abandoned
Array ( [id] => 1092916 [patent_doc_number] => 06825116 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-30 [patent_title] => 'Method for removing structures' [patent_app_type] => B2 [patent_app_number] => 09/845405 [patent_app_country] => US [patent_app_date] => 2001-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3390 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/825/06825116.pdf [firstpage_image] =>[orig_patent_app_number] => 09845405 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/845405
Method for removing structures Apr 29, 2001 Issued
Array ( [id] => 6986901 [patent_doc_number] => 20010036733 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-01 [patent_title] => 'Method of fabricating thin-film transistor' [patent_app_type] => new [patent_app_number] => 09/843985 [patent_app_country] => US [patent_app_date] => 2001-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1860 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20010036733.pdf [firstpage_image] =>[orig_patent_app_number] => 09843985 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/843985
Method of fabricating thin-film transistor Apr 26, 2001 Abandoned
Array ( [id] => 6176859 [patent_doc_number] => 20020155717 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-24 [patent_title] => 'Method for making a microstructure by surface micromachining' [patent_app_type] => new [patent_app_number] => 09/840716 [patent_app_country] => US [patent_app_date] => 2001-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 32410 [patent_no_of_claims] => 66 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0155/20020155717.pdf [firstpage_image] =>[orig_patent_app_number] => 09840716 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/840716
Method for making a microstructure by surface micromachining Apr 22, 2001 Issued
Array ( [id] => 243289 [patent_doc_number] => 07589023 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-09-15 [patent_title] => 'Method of manufacturing semiconductor wafer' [patent_app_type] => utility [patent_app_number] => 10/258282 [patent_app_country] => US [patent_app_date] => 2001-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 18 [patent_no_of_words] => 16733 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/589/07589023.pdf [firstpage_image] =>[orig_patent_app_number] => 10258282 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/258282
Method of manufacturing semiconductor wafer Apr 22, 2001 Issued
Array ( [id] => 715612 [patent_doc_number] => 07052994 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-30 [patent_title] => 'Method for manufacturing semiconductor device, and processing system and semiconductor device' [patent_app_type] => utility [patent_app_number] => 09/840386 [patent_app_country] => US [patent_app_date] => 2001-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 4564 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/052/07052994.pdf [firstpage_image] =>[orig_patent_app_number] => 09840386 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/840386
Method for manufacturing semiconductor device, and processing system and semiconductor device Apr 22, 2001 Issued
Array ( [id] => 5906986 [patent_doc_number] => 20020142613 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-03 [patent_title] => 'Method for controlling etching depth' [patent_app_type] => new [patent_app_number] => 09/824476 [patent_app_country] => US [patent_app_date] => 2001-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2102 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0142/20020142613.pdf [firstpage_image] =>[orig_patent_app_number] => 09824476 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/824476
Method for controlling etching depth Apr 1, 2001 Abandoned
Array ( [id] => 5906937 [patent_doc_number] => 20020142594 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-03 [patent_title] => 'Sacrificial films to provide structural integrity to critical dimension structures' [patent_app_type] => new [patent_app_number] => 09/819914 [patent_app_country] => US [patent_app_date] => 2001-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2434 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0142/20020142594.pdf [firstpage_image] =>[orig_patent_app_number] => 09819914 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/819914
Sacrificial films to provide structural integrity to critical dimension structures Mar 27, 2001 Abandoned
Array ( [id] => 1034491 [patent_doc_number] => 06875700 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-04-05 [patent_title] => 'Ion-Ion plasma processing with bias modulation synchronized to time-modulated discharges' [patent_app_type] => utility [patent_app_number] => 09/820244 [patent_app_country] => US [patent_app_date] => 2001-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7019 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/875/06875700.pdf [firstpage_image] =>[orig_patent_app_number] => 09820244 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/820244
Ion-Ion plasma processing with bias modulation synchronized to time-modulated discharges Mar 27, 2001 Issued
Array ( [id] => 5981410 [patent_doc_number] => 20020096493 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-25 [patent_title] => 'Dry etching method, microfabrication process and dry etching mask' [patent_app_type] => new [patent_app_number] => 09/816784 [patent_app_country] => US [patent_app_date] => 2001-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2788 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0096/20020096493.pdf [firstpage_image] =>[orig_patent_app_number] => 09816784 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/816784
Dry etching method, microfabrication process and dry etching mask Mar 25, 2001 Issued
Array ( [id] => 6540291 [patent_doc_number] => 20020137347 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-26 [patent_title] => 'Circuit board and a method for making the same' [patent_app_type] => new [patent_app_number] => 09/815226 [patent_app_country] => US [patent_app_date] => 2001-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5141 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0137/20020137347.pdf [firstpage_image] =>[orig_patent_app_number] => 09815226 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/815226
Circuit board and a method for making the same Mar 21, 2001 Issued
Array ( [id] => 6333408 [patent_doc_number] => 20020033381 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-03-21 [patent_title] => 'Susceptor and surface processing method' [patent_app_type] => new [patent_app_number] => 09/813152 [patent_app_country] => US [patent_app_date] => 2001-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4667 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20020033381.pdf [firstpage_image] =>[orig_patent_app_number] => 09813152 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/813152
Susceptor and surface processing method Mar 20, 2001 Issued
Array ( [id] => 1073721 [patent_doc_number] => 06838386 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-01-04 [patent_title] => 'Method for precision-processing a fine structure' [patent_app_type] => utility [patent_app_number] => 10/168201 [patent_app_country] => US [patent_app_date] => 2001-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 29 [patent_no_of_words] => 8274 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/838/06838386.pdf [firstpage_image] =>[orig_patent_app_number] => 10168201 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/168201
Method for precision-processing a fine structure Mar 15, 2001 Issued
Array ( [id] => 6889422 [patent_doc_number] => 20010024877 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-09-27 [patent_title] => 'Cluster tool systems and methods for processing wafers' [patent_app_type] => new [patent_app_number] => 09/808790 [patent_app_country] => US [patent_app_date] => 2001-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7737 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0024/20010024877.pdf [firstpage_image] =>[orig_patent_app_number] => 09808790 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/808790
Cluster tool systems and methods for processing wafers Mar 14, 2001 Abandoned
Array ( [id] => 5844645 [patent_doc_number] => 20020132489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-19 [patent_title] => 'Method for fabricating a capacitor by using self-aligned etaching process' [patent_app_type] => new [patent_app_number] => 09/803984 [patent_app_country] => US [patent_app_date] => 2001-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1739 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0132/20020132489.pdf [firstpage_image] =>[orig_patent_app_number] => 09803984 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/803984
Method for fabricating a capacitor by using self-aligned etaching process Mar 12, 2001 Abandoned
Array ( [id] => 1119861 [patent_doc_number] => 06797623 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-28 [patent_title] => 'Methods of producing and polishing semiconductor device and polishing apparatus' [patent_app_type] => B2 [patent_app_number] => 09/800580 [patent_app_country] => US [patent_app_date] => 2001-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 43 [patent_no_of_words] => 19870 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/797/06797623.pdf [firstpage_image] =>[orig_patent_app_number] => 09800580 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/800580
Methods of producing and polishing semiconductor device and polishing apparatus Mar 7, 2001 Issued
Array ( [id] => 6886612 [patent_doc_number] => 20010019881 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-09-06 [patent_title] => 'Plasma processing apparatus and method' [patent_app_type] => new [patent_app_number] => 09/795487 [patent_app_country] => US [patent_app_date] => 2001-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3191 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0019/20010019881.pdf [firstpage_image] =>[orig_patent_app_number] => 09795487 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/795487
Plasma processing apparatus and method Feb 28, 2001 Issued
Array ( [id] => 6900709 [patent_doc_number] => 20010022292 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-09-20 [patent_title] => 'Method of manufacturing a ferroelectric capacitor configuration' [patent_app_type] => new [patent_app_number] => 09/793350 [patent_app_country] => US [patent_app_date] => 2001-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2486 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0022/20010022292.pdf [firstpage_image] =>[orig_patent_app_number] => 09793350 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/793350
Method of manufacturing a ferroelectric capacitor configuration Feb 25, 2001 Issued
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