
Lan Vinh
Examiner (ID: 2362, Phone: (571)272-1471 , Office: P/1713 )
| Most Active Art Unit | 1713 |
| Art Unit(s) | 1765, 1792, 1713 |
| Total Applications | 1662 |
| Issued Applications | 1401 |
| Pending Applications | 46 |
| Abandoned Applications | 218 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1043715
[patent_doc_number] => 06867148
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-03-15
[patent_title] => 'Removal of organic material in integrated circuit fabrication using ozonated organic acid solutions'
[patent_app_type] => utility
[patent_app_number] => 09/858980
[patent_app_country] => US
[patent_app_date] => 2001-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/867/06867148.pdf
[firstpage_image] =>[orig_patent_app_number] => 09858980
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/858980 | Removal of organic material in integrated circuit fabrication using ozonated organic acid solutions | May 15, 2001 | Issued |
Array
(
[id] => 5986515
[patent_doc_number] => 20020098707
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-07-25
[patent_title] => 'Design of lithography alignment and overlay measurement marks on CMP finished damascene surface'
[patent_app_type] => new
[patent_app_number] => 09/854760
[patent_app_country] => US
[patent_app_date] => 2001-05-14
[patent_effective_date] => 0000-00-00
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[patent_words_short_claim] => 140
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[pdf_file] => publications/A1/0098/20020098707.pdf
[firstpage_image] =>[orig_patent_app_number] => 09854760
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/854760 | Design of lithography alignment and overlay measurement marks on CMP finished damascene surface | May 13, 2001 | Issued |
| 09/845894 | Lens arrays and methods of making the lens array | Apr 29, 2001 | Abandoned |
Array
(
[id] => 1092916
[patent_doc_number] => 06825116
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-11-30
[patent_title] => 'Method for removing structures'
[patent_app_type] => B2
[patent_app_number] => 09/845405
[patent_app_country] => US
[patent_app_date] => 2001-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 3390
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[firstpage_image] =>[orig_patent_app_number] => 09845405
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/845405 | Method for removing structures | Apr 29, 2001 | Issued |
Array
(
[id] => 6986901
[patent_doc_number] => 20010036733
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-11-01
[patent_title] => 'Method of fabricating thin-film transistor'
[patent_app_type] => new
[patent_app_number] => 09/843985
[patent_app_country] => US
[patent_app_date] => 2001-04-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 1860
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[pdf_file] => publications/A1/0036/20010036733.pdf
[firstpage_image] =>[orig_patent_app_number] => 09843985
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/843985 | Method of fabricating thin-film transistor | Apr 26, 2001 | Abandoned |
Array
(
[id] => 6176859
[patent_doc_number] => 20020155717
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[patent_kind] => A1
[patent_issue_date] => 2002-10-24
[patent_title] => 'Method for making a microstructure by surface micromachining'
[patent_app_type] => new
[patent_app_number] => 09/840716
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[patent_app_date] => 2001-04-23
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[patent_drawing_sheets_cnt] => 32
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[firstpage_image] =>[orig_patent_app_number] => 09840716
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/840716 | Method for making a microstructure by surface micromachining | Apr 22, 2001 | Issued |
Array
(
[id] => 243289
[patent_doc_number] => 07589023
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[patent_kind] => B2
[patent_issue_date] => 2009-09-15
[patent_title] => 'Method of manufacturing semiconductor wafer'
[patent_app_type] => utility
[patent_app_number] => 10/258282
[patent_app_country] => US
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[pdf_file] => patents/07/589/07589023.pdf
[firstpage_image] =>[orig_patent_app_number] => 10258282
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/258282 | Method of manufacturing semiconductor wafer | Apr 22, 2001 | Issued |
Array
(
[id] => 715612
[patent_doc_number] => 07052994
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[patent_kind] => B2
[patent_issue_date] => 2006-05-30
[patent_title] => 'Method for manufacturing semiconductor device, and processing system and semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 09/840386
[patent_app_country] => US
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[pdf_file] => patents/07/052/07052994.pdf
[firstpage_image] =>[orig_patent_app_number] => 09840386
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/840386 | Method for manufacturing semiconductor device, and processing system and semiconductor device | Apr 22, 2001 | Issued |
Array
(
[id] => 5906986
[patent_doc_number] => 20020142613
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-10-03
[patent_title] => 'Method for controlling etching depth'
[patent_app_type] => new
[patent_app_number] => 09/824476
[patent_app_country] => US
[patent_app_date] => 2001-04-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[firstpage_image] =>[orig_patent_app_number] => 09824476
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/824476 | Method for controlling etching depth | Apr 1, 2001 | Abandoned |
Array
(
[id] => 5906937
[patent_doc_number] => 20020142594
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-10-03
[patent_title] => 'Sacrificial films to provide structural integrity to critical dimension structures'
[patent_app_type] => new
[patent_app_number] => 09/819914
[patent_app_country] => US
[patent_app_date] => 2001-03-28
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[firstpage_image] =>[orig_patent_app_number] => 09819914
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/819914 | Sacrificial films to provide structural integrity to critical dimension structures | Mar 27, 2001 | Abandoned |
Array
(
[id] => 1034491
[patent_doc_number] => 06875700
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-04-05
[patent_title] => 'Ion-Ion plasma processing with bias modulation synchronized to time-modulated discharges'
[patent_app_type] => utility
[patent_app_number] => 09/820244
[patent_app_country] => US
[patent_app_date] => 2001-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
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[pdf_file] => patents/06/875/06875700.pdf
[firstpage_image] =>[orig_patent_app_number] => 09820244
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/820244 | Ion-Ion plasma processing with bias modulation synchronized to time-modulated discharges | Mar 27, 2001 | Issued |
Array
(
[id] => 5981410
[patent_doc_number] => 20020096493
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-07-25
[patent_title] => 'Dry etching method, microfabrication process and dry etching mask'
[patent_app_type] => new
[patent_app_number] => 09/816784
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[patent_app_date] => 2001-03-26
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[pdf_file] => publications/A1/0096/20020096493.pdf
[firstpage_image] =>[orig_patent_app_number] => 09816784
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/816784 | Dry etching method, microfabrication process and dry etching mask | Mar 25, 2001 | Issued |
Array
(
[id] => 6540291
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[patent_issue_date] => 2002-09-26
[patent_title] => 'Circuit board and a method for making the same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/815226 | Circuit board and a method for making the same | Mar 21, 2001 | Issued |
Array
(
[id] => 6333408
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[patent_title] => 'Susceptor and surface processing method'
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Array
(
[id] => 1073721
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/168201 | Method for precision-processing a fine structure | Mar 15, 2001 | Issued |
Array
(
[id] => 6889422
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Array
(
[id] => 5844645
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Array
(
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Array
(
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/793350 | Method of manufacturing a ferroelectric capacitor configuration | Feb 25, 2001 | Issued |