Lan Vinh

Array ( [id] => 1177598 [patent_doc_number] => 06743730 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-01 [patent_title] => 'Plasma processing method' [patent_app_type] => B1 [patent_app_number] => 09/671201 [patent_app_country] => US [patent_app_date] => 2000-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 4044 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/743/06743730.pdf [firstpage_image] =>[orig_patent_app_number] => 09671201 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1037519 [patent_doc_number] => 06872668 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-03-29 [patent_title] => 'Multi-step tungsten etchback process to preserve barrier integrity in an integrated circuit structure' [patent_app_type] => utility [patent_app_number] => 09/671667 [patent_app_country] => US [patent_app_date] => 2000-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3733 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/872/06872668.pdf [firstpage_image] =>[orig_patent_app_number] => 09671667 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1500499 [patent_doc_number] => 06486070 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-26 [patent_title] => 'Ultra-high oxide to photoresist selective etch of high-aspect-ratio openings in a low-pressure, high-density plasma' [patent_app_type] => B1 [patent_app_number] => 09/666762 [patent_app_country] => US [patent_app_date] => 2000-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2819 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/486/06486070.pdf [firstpage_image] =>[orig_patent_app_number] => 09666762 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1574827 [patent_doc_number] => 06468915 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-22 [patent_title] => 'Method of silicon oxynitride ARC removal after gate etching' [patent_app_type] => B1 [patent_app_number] => 09/666317 [patent_app_country] => US [patent_app_date] => 2000-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 3602 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/468/06468915.pdf [firstpage_image] =>[orig_patent_app_number] => 09666317 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1235792 [patent_doc_number] => 06689697 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-02-10 [patent_title] => 'Method of forming uniformly planarized structure in a semiconductor wafer' [patent_app_type] => B1 [patent_app_number] => 09/666340 [patent_app_country] => US [patent_app_date] => 2000-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 2307 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/689/06689697.pdf [firstpage_image] =>[orig_patent_app_number] => 09666340 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1550551 [patent_doc_number] => 06399509 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-04 [patent_title] => 'Defects reduction for a metal etcher' [patent_app_type] => B1 [patent_app_number] => 09/664426 [patent_app_country] => US [patent_app_date] => 2000-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 3403 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/399/06399509.pdf [firstpage_image] =>[orig_patent_app_number] => 09664426 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1126749 [patent_doc_number] => 06790785 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-09-14 [patent_title] => 'Metal-assisted chemical etch porous silicon formation method' [patent_app_type] => B1 [patent_app_number] => 09/662682 [patent_app_country] => US [patent_app_date] => 2000-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 3036 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/790/06790785.pdf [firstpage_image] =>[orig_patent_app_number] => 09662682 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1534656 [patent_doc_number] => 06489242 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-03 [patent_title] => 'Process for planarization of integrated circuit structure which inhibits cracking of low dielectric constant dielectric material adjacent underlying raised structures' [patent_app_type] => B1 [patent_app_number] => 09/661465 [patent_app_country] => US [patent_app_date] => 2000-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 4163 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/489/06489242.pdf [firstpage_image] =>[orig_patent_app_number] => 09661465 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1202742 [patent_doc_number] => 06720270 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-13 [patent_title] => 'Method for reducing size of semiconductor unit in packaging process' [patent_app_type] => B1 [patent_app_number] => 09/660753 [patent_app_country] => US [patent_app_date] => 2000-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 0 [patent_no_of_words] => 2986 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/720/06720270.pdf [firstpage_image] =>[orig_patent_app_number] => 09660753 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1336610 [patent_doc_number] => 06593244 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-15 [patent_title] => 'Process for etching conductors at high etch rates' [patent_app_type] => B1 [patent_app_number] => 09/659072 [patent_app_country] => US [patent_app_date] => 2000-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2767 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/593/06593244.pdf [firstpage_image] =>[orig_patent_app_number] => 09659072 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1134529 [patent_doc_number] => 06784108 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-31 [patent_title] => 'Gas pulsing for etch profile control' [patent_app_type] => B1 [patent_app_number] => 09/651871 [patent_app_country] => US [patent_app_date] => 2000-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 22 [patent_no_of_words] => 10114 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/784/06784108.pdf [firstpage_image] =>[orig_patent_app_number] => 09651871 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1362193 [patent_doc_number] => 06569774 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-27 [patent_title] => 'Method to eliminate striations and surface roughness caused by dry etch' [patent_app_type] => B1 [patent_app_number] => 09/652835 [patent_app_country] => US [patent_app_date] => 2000-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 5608 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/569/06569774.pdf [firstpage_image] =>[orig_patent_app_number] => 09652835 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1073717 [patent_doc_number] => 06838382 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-01-04 [patent_title] => 'Method and apparatus for forming a planarizing pad having a film and texture elements for planarization of microelectronic substrates' [patent_app_type] => utility [patent_app_number] => 09/649427 [patent_app_country] => US [patent_app_date] => 2000-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6555 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/838/06838382.pdf [firstpage_image] =>[orig_patent_app_number] => 09649427 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1132323 [patent_doc_number] => 06783695 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-31 [patent_title] => 'Acid blend for removing etch residue' [patent_app_type] => B1 [patent_app_number] => 09/643946 [patent_app_country] => US [patent_app_date] => 2000-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4289 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/783/06783695.pdf [firstpage_image] =>[orig_patent_app_number] => 09643946 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1390845 [patent_doc_number] => 06544895 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-08 [patent_title] => 'Methods for use of pulsed voltage in a plasma reactor' [patent_app_type] => B1 [patent_app_number] => 09/640449 [patent_app_country] => US [patent_app_date] => 2000-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3634 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/544/06544895.pdf [firstpage_image] =>[orig_patent_app_number] => 09640449 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1414843 [patent_doc_number] => 06521534 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-18 [patent_title] => 'Treatment of exposed silicon and silicon dioxide surfaces' [patent_app_type] => B1 [patent_app_number] => 09/639369 [patent_app_country] => US [patent_app_date] => 2000-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3277 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/521/06521534.pdf [firstpage_image] =>[orig_patent_app_number] => 09639369 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4325540 [patent_doc_number] => 06329301 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-11 [patent_title] => 'Method and apparatus for selective removal of material from wafer alignment marks' [patent_app_type] => 1 [patent_app_number] => 9/639421 [patent_app_country] => US [patent_app_date] => 2000-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4539 [patent_no_of_claims] => 64 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/329/06329301.pdf [firstpage_image] =>[orig_patent_app_number] => 639421 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1559898 [patent_doc_number] => 06436829 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-20 [patent_title] => 'Two phase chemical/mechanical polishing process for tungsten layers' [patent_app_type] => B1 [patent_app_number] => 09/632445 [patent_app_country] => US [patent_app_date] => 2000-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2977 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/436/06436829.pdf [firstpage_image] =>[orig_patent_app_number] => 09632445 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1336600 [patent_doc_number] => 06593243 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-15 [patent_title] => 'Method of manufacturing semiconductor device' [patent_app_type] => B1 [patent_app_number] => 09/632163 [patent_app_country] => US [patent_app_date] => 2000-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 3488 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/593/06593243.pdf [firstpage_image] =>[orig_patent_app_number] => 09632163 [rel_patent_id] =>[rel_patent_doc_number] =>)