Search

Lan Vinh

Examiner (ID: 2362, Phone: (571)272-1471 , Office: P/1713 )

Most Active Art Unit
1713
Art Unit(s)
1765, 1792, 1713
Total Applications
1662
Issued Applications
1401
Pending Applications
46
Abandoned Applications
218

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1424655 [patent_doc_number] => 06503843 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-07 [patent_title] => 'Multistep chamber cleaning and film deposition process using a remote plasma that also enhances film gap fill' [patent_app_type] => B1 [patent_app_number] => 09/400338 [patent_app_country] => US [patent_app_date] => 1999-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 7613 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/503/06503843.pdf [firstpage_image] =>[orig_patent_app_number] => 09400338 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/400338
Multistep chamber cleaning and film deposition process using a remote plasma that also enhances film gap fill Sep 20, 1999 Issued
Array ( [id] => 7640275 [patent_doc_number] => 06395639 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-28 [patent_title] => 'Process for improving line width variations between tightly spaced and isolated features in integrated circuits' [patent_app_type] => B1 [patent_app_number] => 09/397458 [patent_app_country] => US [patent_app_date] => 1999-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 5204 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 15 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/395/06395639.pdf [firstpage_image] =>[orig_patent_app_number] => 09397458 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/397458
Process for improving line width variations between tightly spaced and isolated features in integrated circuits Sep 15, 1999 Issued
Array ( [id] => 5825813 [patent_doc_number] => 20020066884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-06 [patent_title] => 'ETCHING GAS FOR SILICON ETCH BACK' [patent_app_type] => new [patent_app_number] => 09/396500 [patent_app_country] => US [patent_app_date] => 1999-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2121 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0066/20020066884.pdf [firstpage_image] =>[orig_patent_app_number] => 09396500 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/396500
ETCHING GAS FOR SILICON ETCH BACK Sep 9, 1999 Abandoned
Array ( [id] => 1594677 [patent_doc_number] => 06383939 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-07 [patent_title] => 'Method for etching memory gate stack using thin resist layer' [patent_app_type] => B1 [patent_app_number] => 09/375504 [patent_app_country] => US [patent_app_date] => 1999-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2976 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/383/06383939.pdf [firstpage_image] =>[orig_patent_app_number] => 09375504 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/375504
Method for etching memory gate stack using thin resist layer Aug 16, 1999 Issued
Array ( [id] => 4287016 [patent_doc_number] => 06211091 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-03 [patent_title] => 'Self-aligned eetching process' [patent_app_type] => 1 [patent_app_number] => 9/373318 [patent_app_country] => US [patent_app_date] => 1999-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2296 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/211/06211091.pdf [firstpage_image] =>[orig_patent_app_number] => 373318 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/373318
Self-aligned eetching process Aug 11, 1999 Issued
09/358940 HIGH SELECTIVITY BPSG TO TEOS ETCHANT Jul 21, 1999 Abandoned
Array ( [id] => 4183029 [patent_doc_number] => 06150278 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-21 [patent_title] => 'Method of fabricating node capacitor for DRAM processes' [patent_app_type] => 1 [patent_app_number] => 9/357236 [patent_app_country] => US [patent_app_date] => 1999-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 1459 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 315 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/150/06150278.pdf [firstpage_image] =>[orig_patent_app_number] => 357236 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/357236
Method of fabricating node capacitor for DRAM processes Jul 19, 1999 Issued
Array ( [id] => 693679 [patent_doc_number] => 07070702 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-07-04 [patent_title] => 'Pattern formation method using light-induced suppression of etching' [patent_app_type] => utility [patent_app_number] => 09/743966 [patent_app_country] => US [patent_app_date] => 1999-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 2819 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/070/07070702.pdf [firstpage_image] =>[orig_patent_app_number] => 09743966 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/743966
Pattern formation method using light-induced suppression of etching Jul 19, 1999 Issued
Array ( [id] => 1239730 [patent_doc_number] => 06686287 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-02-03 [patent_title] => 'Semiconductor device manufacturing method and apparatus' [patent_app_type] => B1 [patent_app_number] => 09/353661 [patent_app_country] => US [patent_app_date] => 1999-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 21 [patent_no_of_words] => 6505 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/686/06686287.pdf [firstpage_image] =>[orig_patent_app_number] => 09353661 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/353661
Semiconductor device manufacturing method and apparatus Jul 14, 1999 Issued
Array ( [id] => 1372222 [patent_doc_number] => 06562726 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-13 [patent_title] => 'Acid blend for removing etch residue' [patent_app_type] => B1 [patent_app_number] => 09/342243 [patent_app_country] => US [patent_app_date] => 1999-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4257 [patent_no_of_claims] => 103 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/562/06562726.pdf [firstpage_image] =>[orig_patent_app_number] => 09342243 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/342243
Acid blend for removing etch residue Jun 28, 1999 Issued
Array ( [id] => 6986898 [patent_doc_number] => 20010036730 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-01 [patent_title] => 'METHOD FOR FABRICATING A DRAM CELL CAPACITOR' [patent_app_type] => new [patent_app_number] => 09/342320 [patent_app_country] => US [patent_app_date] => 1999-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1938 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20010036730.pdf [firstpage_image] =>[orig_patent_app_number] => 09342320 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/342320
METHOD FOR FABRICATING A DRAM CELL CAPACITOR Jun 28, 1999 Abandoned
Array ( [id] => 4294430 [patent_doc_number] => 06197698 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-06 [patent_title] => 'Method for etching a poly-silicon layer of a semiconductor wafer' [patent_app_type] => 1 [patent_app_number] => 9/340400 [patent_app_country] => US [patent_app_date] => 1999-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 1919 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/197/06197698.pdf [firstpage_image] =>[orig_patent_app_number] => 340400 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/340400
Method for etching a poly-silicon layer of a semiconductor wafer Jun 27, 1999 Issued
Array ( [id] => 6878173 [patent_doc_number] => 20010002328 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-05-31 [patent_title] => 'METHOD FOR HOMOGENIZING DEVICE PARAMETERS THROUGH PHOTORESIST PLANARIZATION' [patent_app_type] => new-utility [patent_app_number] => 09/340796 [patent_app_country] => US [patent_app_date] => 1999-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2670 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 26 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20010002328.pdf [firstpage_image] =>[orig_patent_app_number] => 09340796 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/340796
Method for homogenizing device parameters through photoresist planarization Jun 27, 1999 Issued
Array ( [id] => 4395660 [patent_doc_number] => 06297165 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-02 [patent_title] => 'Etching and cleaning methods' [patent_app_type] => 1 [patent_app_number] => 9/339621 [patent_app_country] => US [patent_app_date] => 1999-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 3445 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/297/06297165.pdf [firstpage_image] =>[orig_patent_app_number] => 339621 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/339621
Etching and cleaning methods Jun 23, 1999 Issued
Array ( [id] => 1380836 [patent_doc_number] => 06544331 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-08 [patent_title] => 'Crystal oscillator and manufacturing method thereof' [patent_app_type] => B1 [patent_app_number] => 09/313763 [patent_app_country] => US [patent_app_date] => 1999-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 5024 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/544/06544331.pdf [firstpage_image] =>[orig_patent_app_number] => 09313763 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/313763
Crystal oscillator and manufacturing method thereof May 17, 1999 Issued
Array ( [id] => 7118449 [patent_doc_number] => 20010001733 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-05-24 [patent_title] => 'IMPROVED METHOD FOR SELECTIVELY ETCHING A SEMICONDUCTOR DEVICE' [patent_app_type] => new-utility [patent_app_number] => 09/312738 [patent_app_country] => US [patent_app_date] => 1999-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1946 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20010001733.pdf [firstpage_image] =>[orig_patent_app_number] => 09312738 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/312738
IMPROVED METHOD FOR SELECTIVELY ETCHING A SEMICONDUCTOR DEVICE May 13, 1999 Abandoned
Array ( [id] => 1146118 [patent_doc_number] => 06770132 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-03 [patent_title] => 'Method for pressurized annealing of lithium niobate and resulting lithium niobate structures' [patent_app_type] => B1 [patent_app_number] => 09/309361 [patent_app_country] => US [patent_app_date] => 1999-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 4804 [patent_no_of_claims] => 54 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/770/06770132.pdf [firstpage_image] =>[orig_patent_app_number] => 09309361 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/309361
Method for pressurized annealing of lithium niobate and resulting lithium niobate structures May 10, 1999 Issued
Array ( [id] => 4286008 [patent_doc_number] => 06183555 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-06 [patent_title] => 'Surface acoustic wave device, substrate therefor, and method of manufacturing the substrate' [patent_app_type] => 1 [patent_app_number] => 9/309515 [patent_app_country] => US [patent_app_date] => 1999-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 4514 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 320 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/183/06183555.pdf [firstpage_image] =>[orig_patent_app_number] => 309515 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/309515
Surface acoustic wave device, substrate therefor, and method of manufacturing the substrate May 10, 1999 Issued
09/307995 OPTICAL ENDPOINT DETECTION DURING CHEMICAL MECHANICAL PLANARIZATION May 9, 1999 Abandoned
Array ( [id] => 1542784 [patent_doc_number] => 06372651 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-16 [patent_title] => 'Method for trimming a photoresist pattern line for memory gate etching' [patent_app_type] => B1 [patent_app_number] => 09/286464 [patent_app_country] => US [patent_app_date] => 1999-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3122 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/372/06372651.pdf [firstpage_image] =>[orig_patent_app_number] => 09286464 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/286464
Method for trimming a photoresist pattern line for memory gate etching Apr 5, 1999 Issued
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