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Lance Leonard Barry

Examiner (ID: 11117, Phone: (571)272-5856 , Office: P/2448 )

Most Active Art Unit
2448
Art Unit(s)
2782, 2756, 2457, 2448, 2308, 2317
Total Applications
784
Issued Applications
573
Pending Applications
70
Abandoned Applications
158

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3565774 [patent_doc_number] => 05574859 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-12 [patent_title] => 'Method and apparatus for using a software configurable connector to connect a palmtop computer having a custom port to a host having a standard port' [patent_app_type] => 1 [patent_app_number] => 8/009364 [patent_app_country] => US [patent_app_date] => 1993-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 5095 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/574/05574859.pdf [firstpage_image] =>[orig_patent_app_number] => 009364 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/009364
Method and apparatus for using a software configurable connector to connect a palmtop computer having a custom port to a host having a standard port Jan 25, 1993 Issued
Array ( [id] => 3129711 [patent_doc_number] => 05410715 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-04-25 [patent_title] => 'Interrupt controller with selectable interrupt nesting function' [patent_app_type] => 1 [patent_app_number] => 8/008387 [patent_app_country] => US [patent_app_date] => 1993-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 5812 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/410/05410715.pdf [firstpage_image] =>[orig_patent_app_number] => 008387 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/008387
Interrupt controller with selectable interrupt nesting function Jan 24, 1993 Issued
Array ( [id] => 3503805 [patent_doc_number] => 05561816 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-01 [patent_title] => 'Data transfer controlling device for use in a direct memory access (DMA) system' [patent_app_type] => 1 [patent_app_number] => 8/003851 [patent_app_country] => US [patent_app_date] => 1993-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5042 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 320 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/561/05561816.pdf [firstpage_image] =>[orig_patent_app_number] => 003851 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/003851
Data transfer controlling device for use in a direct memory access (DMA) system Jan 10, 1993 Issued
Array ( [id] => 3894974 [patent_doc_number] => 05799186 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-25 [patent_title] => 'Method and apparatus for programming a peripheral processor with a serial output memory device' [patent_app_type] => 1 [patent_app_number] => 8/001411 [patent_app_country] => US [patent_app_date] => 1993-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3381 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 266 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/799/05799186.pdf [firstpage_image] =>[orig_patent_app_number] => 001411 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/001411
Method and apparatus for programming a peripheral processor with a serial output memory device Jan 6, 1993 Issued
08/001195 METHOD OF DYNAMICALLY ADJUSTING SNA NETWORK CONTROL PROGRAM PARAMETERS Jan 6, 1993 Abandoned
07/993081 CHANNEL TIME-OUT APPARATUS AND METHOD Dec 17, 1992 Abandoned
07/991045 DYNAMIC FREQUENCY SHIFTING WITH DIVIDE BY ONE CLOCK GENERATORS Dec 14, 1992 Abandoned
07/987990 METHOD AND APPARATUS FOR ADVISING A PROCESS OF A STATE OF SYNCHRONIZATION LOCK OF A SHARED PROCESS Dec 8, 1992 Abandoned
07/980012 METHOD AND APPARATUS FOR MINIMIZING POWER CONSUMPTION IN AN ELECTRONIC CIRCUIT BY CONTROLLING THE CLOCK FREQUENCY THEREOF Nov 22, 1992 Abandoned
07/978291 MICROCOMPUTER SYSTEM Nov 17, 1992 Abandoned
Array ( [id] => 3539499 [patent_doc_number] => 05528758 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-18 [patent_title] => 'Method and apparatus for providing a portable computer with integrated circuit (IC) memory card storage in custom and standard formats' [patent_app_type] => 1 [patent_app_number] => 7/975375 [patent_app_country] => US [patent_app_date] => 1992-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 5957 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/528/05528758.pdf [firstpage_image] =>[orig_patent_app_number] => 975375 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/975375
Method and apparatus for providing a portable computer with integrated circuit (IC) memory card storage in custom and standard formats Nov 12, 1992 Issued
07/975157 SYSTEM FOR PREVENTING AN UNSELECTED CONTROLLER FROM TRANSFERRING DATA VIA A FIRST BUS WHILE CONCURRENTLY PERMITTING IT TO TRANSFER DATA VIA A SECOND BUS Nov 11, 1992 Issued
Array ( [id] => 3503736 [patent_doc_number] => 05561811 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-01 [patent_title] => 'Method and apparatus for per-user customization of applications shared by a plurality of users on a single display' [patent_app_type] => 1 [patent_app_number] => 7/974044 [patent_app_country] => US [patent_app_date] => 1992-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 26 [patent_no_of_words] => 8901 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/561/05561811.pdf [firstpage_image] =>[orig_patent_app_number] => 974044 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/974044
Method and apparatus for per-user customization of applications shared by a plurality of users on a single display Nov 9, 1992 Issued
07/967948 I/O MODULE WITH SERIAL DATA RING TRANSFER Oct 26, 1992 Abandoned
Array ( [id] => 3023609 [patent_doc_number] => 05333269 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-07-26 [patent_title] => 'Mechanism for transferring messages between source and destination users through a shared memory' [patent_app_type] => 1 [patent_app_number] => 7/965554 [patent_app_country] => US [patent_app_date] => 1992-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 34 [patent_no_of_words] => 15789 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 815 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/333/05333269.pdf [firstpage_image] =>[orig_patent_app_number] => 965554 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/965554
Mechanism for transferring messages between source and destination users through a shared memory Oct 22, 1992 Issued
07/965033 APPARATUS AND METHOD FOR INTERFACING MULTIPLE I/O BUSES TO A COMPUTER SYSTEM BUS Oct 21, 1992 Abandoned
Array ( [id] => 4081657 [patent_doc_number] => 05867695 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-02 [patent_title] => 'Method and system for reduced metastability between devices which communicate and operate at different clock frequencies' [patent_app_type] => 1 [patent_app_number] => 7/962425 [patent_app_country] => US [patent_app_date] => 1992-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2965 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/867/05867695.pdf [firstpage_image] =>[orig_patent_app_number] => 962425 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/962425
Method and system for reduced metastability between devices which communicate and operate at different clock frequencies Oct 15, 1992 Issued
07/962047 MULTI-MODE MICROPROCESSOR HAVING A PIN FOR RESETTING ITS REGISTERS WITHOUT PURGING ITS CACHE Oct 15, 1992 Abandoned
Array ( [id] => 3111596 [patent_doc_number] => 05319785 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-06-07 [patent_title] => 'Polling of I/O device status comparison performed in the polled I/O device' [patent_app_type] => 1 [patent_app_number] => 7/962624 [patent_app_country] => US [patent_app_date] => 1992-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4081 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/319/05319785.pdf [firstpage_image] =>[orig_patent_app_number] => 962624 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/962624
Polling of I/O device status comparison performed in the polled I/O device Oct 15, 1992 Issued
Array ( [id] => 3487357 [patent_doc_number] => 05428800 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-06-27 [patent_title] => 'Input/output (I/O) bidirectional buffer for interfacing I/O ports of a field programmable interconnection device with array ports of a cross-point switch' [patent_app_type] => 1 [patent_app_number] => 7/960965 [patent_app_country] => US [patent_app_date] => 1992-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5725 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 290 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/428/05428800.pdf [firstpage_image] =>[orig_patent_app_number] => 960965 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/960965
Input/output (I/O) bidirectional buffer for interfacing I/O ports of a field programmable interconnection device with array ports of a cross-point switch Oct 12, 1992 Issued
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