Search

Larry T. Mackall

Examiner (ID: 10850, Phone: (571)270-1172 , Office: P/2131 )

Most Active Art Unit
2139
Art Unit(s)
2131, 2139, 2189
Total Applications
904
Issued Applications
724
Pending Applications
65
Abandoned Applications
134

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17372010 [patent_doc_number] => 20220027062 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-27 [patent_title] => RELOCATING DATA TO LOW LATENCY MEMORY [patent_app_type] => utility [patent_app_number] => 17/450653 [patent_app_country] => US [patent_app_date] => 2021-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8586 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17450653 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/450653
Relocating data to low latency memory Oct 11, 2021 Issued
Array ( [id] => 17915538 [patent_doc_number] => 20220317934 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => EFFICIENT AND LOW LATENCY MEMORY ACCESS SCHEDULING [patent_app_type] => utility [patent_app_number] => 17/490684 [patent_app_country] => US [patent_app_date] => 2021-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10131 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17490684 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/490684
Efficient and low latency memory access scheduling Sep 29, 2021 Issued
Array ( [id] => 17345650 [patent_doc_number] => 20220011981 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-13 [patent_title] => MEMORY SYSTEM AND METHOD OF CONTROLLING NONVOLATILE MEMORY WITH CHECKING A TOTAL SIZE INDICATIVE OF A SUM OF DATA LENGTH SPECIFIED BY A WRITE COMMAND [patent_app_type] => utility [patent_app_number] => 17/484365 [patent_app_country] => US [patent_app_date] => 2021-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13329 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17484365 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/484365
Memory system and method of controlling nonvolatile memory with checking a total size indicative of a sum of data length specified by a write command Sep 23, 2021 Issued
Array ( [id] => 18234740 [patent_doc_number] => 11599298 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-03-07 [patent_title] => Storage system and method for prediction-based pre-erase of blocks to improve sequential performance [patent_app_type] => utility [patent_app_number] => 17/482690 [patent_app_country] => US [patent_app_date] => 2021-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 6168 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17482690 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/482690
Storage system and method for prediction-based pre-erase of blocks to improve sequential performance Sep 22, 2021 Issued
Array ( [id] => 17316827 [patent_doc_number] => 20210405876 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => STORING DATA BASED ON A PROBABILITY OF A DATA GRAPH [patent_app_type] => utility [patent_app_number] => 17/471841 [patent_app_country] => US [patent_app_date] => 2021-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8221 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17471841 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/471841
Storing data based on a probability of a data graph Sep 9, 2021 Issued
Array ( [id] => 18356599 [patent_doc_number] => 11644999 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-09 [patent_title] => Protecting memory regions based on occurrence of an event [patent_app_type] => utility [patent_app_number] => 17/472432 [patent_app_country] => US [patent_app_date] => 2021-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6270 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17472432 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/472432
Protecting memory regions based on occurrence of an event Sep 9, 2021 Issued
Array ( [id] => 18291213 [patent_doc_number] => 11620083 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-04 [patent_title] => Method for implementing predictable latency mode feature in SSD, and non-volatile memory (NVM) based storage device [patent_app_type] => utility [patent_app_number] => 17/463908 [patent_app_country] => US [patent_app_date] => 2021-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3198 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17463908 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/463908
Method for implementing predictable latency mode feature in SSD, and non-volatile memory (NVM) based storage device Aug 31, 2021 Issued
Array ( [id] => 19313378 [patent_doc_number] => 12039192 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-16 [patent_title] => Efficient buffer management for media management commands in memory devices [patent_app_type] => utility [patent_app_number] => 17/446191 [patent_app_country] => US [patent_app_date] => 2021-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10513 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 317 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17446191 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/446191
Efficient buffer management for media management commands in memory devices Aug 26, 2021 Issued
Array ( [id] => 18154725 [patent_doc_number] => 11567703 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-31 [patent_title] => Memory device comprising queue layer and storage device including the same [patent_app_type] => utility [patent_app_number] => 17/446110 [patent_app_country] => US [patent_app_date] => 2021-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 10268 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17446110 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/446110
Memory device comprising queue layer and storage device including the same Aug 25, 2021 Issued
Array ( [id] => 18210026 [patent_doc_number] => 20230056287 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-23 [patent_title] => DYNAMIC PARTITION COMMAND QUEUES FOR A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/445474 [patent_app_country] => US [patent_app_date] => 2021-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6765 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17445474 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/445474
Dynamic partition command queues for a memory device Aug 18, 2021 Issued
Array ( [id] => 18356595 [patent_doc_number] => 11644995 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-05-09 [patent_title] => Application and system settings configuration filtering during physical to virtual hard disk conversion [patent_app_type] => utility [patent_app_number] => 17/404997 [patent_app_country] => US [patent_app_date] => 2021-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2016 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17404997 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/404997
Application and system settings configuration filtering during physical to virtual hard disk conversion Aug 16, 2021 Issued
Array ( [id] => 18193510 [patent_doc_number] => 20230047029 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => METHOD AND SYSTEM FOR BUFFER ALLOCATION MANAGEMENT FOR A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/402192 [patent_app_country] => US [patent_app_date] => 2021-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12421 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17402192 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/402192
Method and system for buffer allocation management for a memory device Aug 12, 2021 Issued
Array ( [id] => 18192794 [patent_doc_number] => 20230046313 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => DYNAMIC STATUS REGISTERS ARRAY [patent_app_type] => utility [patent_app_number] => 17/399889 [patent_app_country] => US [patent_app_date] => 2021-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14632 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17399889 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/399889
Dynamic status registers array Aug 10, 2021 Issued
Array ( [id] => 18668317 [patent_doc_number] => 11775215 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-03 [patent_title] => Storage device with host-controlled operation mode, electronic system including the same, and method of operating the same [patent_app_type] => utility [patent_app_number] => 17/395027 [patent_app_country] => US [patent_app_date] => 2021-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 14484 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17395027 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/395027
Storage device with host-controlled operation mode, electronic system including the same, and method of operating the same Aug 4, 2021 Issued
Array ( [id] => 17276460 [patent_doc_number] => 20210382658 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-09 [patent_title] => Partial Execution of a Write Command from a Host System [patent_app_type] => utility [patent_app_number] => 17/393234 [patent_app_country] => US [patent_app_date] => 2021-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10552 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17393234 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/393234
Partial execution of a write command from a host system Aug 2, 2021 Issued
Array ( [id] => 17387694 [patent_doc_number] => 20220035546 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-03 [patent_title] => BASE AND COMPRESSED DIFFERENCE DATA DEDUPLICATION [patent_app_type] => utility [patent_app_number] => 17/393324 [patent_app_country] => US [patent_app_date] => 2021-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8542 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17393324 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/393324
Base and compressed difference data deduplication Aug 2, 2021 Issued
Array ( [id] => 18606569 [patent_doc_number] => 11748033 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-05 [patent_title] => Transaction management using metadata [patent_app_type] => utility [patent_app_number] => 17/390093 [patent_app_country] => US [patent_app_date] => 2021-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 22858 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17390093 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/390093
Transaction management using metadata Jul 29, 2021 Issued
Array ( [id] => 18262013 [patent_doc_number] => 11609714 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-21 [patent_title] => Transaction management based on metadata [patent_app_type] => utility [patent_app_number] => 17/385453 [patent_app_country] => US [patent_app_date] => 2021-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 24910 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17385453 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/385453
Transaction management based on metadata Jul 25, 2021 Issued
Array ( [id] => 17216300 [patent_doc_number] => 20210349638 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-11 [patent_title] => Remote Direct Memory Access in Multi-Tier Memory Systems [patent_app_type] => utility [patent_app_number] => 17/382200 [patent_app_country] => US [patent_app_date] => 2021-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17959 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17382200 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/382200
Remote direct memory access in multi-tier memory systems Jul 20, 2021 Issued
Array ( [id] => 18275952 [patent_doc_number] => 11614895 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-28 [patent_title] => Data storage device for read operation and method of the same [patent_app_type] => utility [patent_app_number] => 17/380557 [patent_app_country] => US [patent_app_date] => 2021-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 15996 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17380557 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/380557
Data storage device for read operation and method of the same Jul 19, 2021 Issued
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