Larry T. Mackall

Array ( [id] => 10543520 [patent_doc_number] => 09268652 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-02-23 [patent_title] => 'Cached volumes at storage gateways' [patent_app_type] => utility [patent_app_number] => 13/665708 [patent_app_country] => US [patent_app_date] => 2012-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 23024 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13665708 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12371940 [patent_doc_number] => 09958863 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-01 [patent_title] => Method, system, and device for monitoring operations of a system asset [patent_app_type] => utility [patent_app_number] => 13/665066 [patent_app_country] => US [patent_app_date] => 2012-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4492 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13665066 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9451632 [patent_doc_number] => 20140122802 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-01 [patent_title] => 'ACCESSING AN OFF-CHIP CACHE VIA SILICON PHOTONIC WAVEGUIDES' [patent_app_type] => utility [patent_app_number] => 13/665826 [patent_app_country] => US [patent_app_date] => 2012-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5069 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13665826 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10170887 [patent_doc_number] => 09201595 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-01 [patent_title] => 'High speed read access memory array with variation tolerant bypass scheme with protection circuit' [patent_app_type] => utility [patent_app_number] => 13/622896 [patent_app_country] => US [patent_app_date] => 2012-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6090 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13622896 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9372385 [patent_doc_number] => 20140082258 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-20 [patent_title] => 'MULTI-SERVER AGGREGATED FLASH STORAGE APPLIANCE' [patent_app_type] => utility [patent_app_number] => 13/622684 [patent_app_country] => US [patent_app_date] => 2012-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2065 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13622684 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10072452 [patent_doc_number] => 09110811 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-08-18 [patent_title] => 'Prefetching method and apparatus' [patent_app_type] => utility [patent_app_number] => 13/622069 [patent_app_country] => US [patent_app_date] => 2012-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5098 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13622069 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8722589 [patent_doc_number] => 20130073806 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-21 [patent_title] => 'TECHNIQUES FOR TRANSLATING POLICIES INTO STORAGE CONTROLLER REQUIREMENTS' [patent_app_type] => utility [patent_app_number] => 13/622039 [patent_app_country] => US [patent_app_date] => 2012-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3494 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13622039 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9029547 [patent_doc_number] => 08539144 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-17 [patent_title] => 'Nonvolatile semiconductor memory device with advanced multi-page program operation' [patent_app_type] => utility [patent_app_number] => 13/561204 [patent_app_country] => US [patent_app_date] => 2012-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3971 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13561204 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9578785 [patent_doc_number] => 08769220 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-07-01 [patent_title] => 'Method and apparatus for mitigating performance impact of background processing on interactive applications' [patent_app_type] => utility [patent_app_number] => 13/551231 [patent_app_country] => US [patent_app_date] => 2012-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3058 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13551231 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9326187 [patent_doc_number] => 08661224 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-25 [patent_title] => 'Wirelessly configurable memory device addressing' [patent_app_type] => utility [patent_app_number] => 13/542284 [patent_app_country] => US [patent_app_date] => 2012-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 10766 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13542284 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10841151 [patent_doc_number] => 08868850 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-21 [patent_title] => 'Recovering data segment contents in a distributed shared memory' [patent_app_type] => utility [patent_app_number] => 13/539566 [patent_app_country] => US [patent_app_date] => 2012-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9054 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13539566 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8466718 [patent_doc_number] => 20120271886 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-25 [patent_title] => 'DISTRIBUTED SHARED MEMORY' [patent_app_type] => utility [patent_app_number] => 13/539546 [patent_app_country] => US [patent_app_date] => 2012-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9051 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13539546 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9585733 [patent_doc_number] => 08775743 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-08 [patent_title] => 'Resolving ownership deadlock in a distributed shared memory' [patent_app_type] => utility [patent_app_number] => 13/539563 [patent_app_country] => US [patent_app_date] => 2012-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9054 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 298 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13539563 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9275943 [patent_doc_number] => 08639890 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-01-28 [patent_title] => 'Data segment version numbers in distributed shared memory' [patent_app_type] => utility [patent_app_number] => 13/539540 [patent_app_country] => US [patent_app_date] => 2012-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9054 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13539540 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8466719 [patent_doc_number] => 20120271887 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-25 [patent_title] => 'DISTRIBUTED SHARED MEMORY' [patent_app_type] => utility [patent_app_number] => 13/539549 [patent_app_country] => US [patent_app_date] => 2012-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9051 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13539549 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12114159 [patent_doc_number] => 09870152 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-16 [patent_title] => 'Management system and management method for managing data units constituting schemas of a database' [patent_app_type] => utility [patent_app_number] => 14/404963 [patent_app_country] => US [patent_app_date] => 2012-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 35 [patent_no_of_words] => 12563 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 279 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14404963 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13172081 [patent_doc_number] => 10102157 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-16 [patent_title] => Method and apparatus for reducing power consumption in a memory bus interface by selectively disabling and enabling sense amplifiers [patent_app_type] => utility [patent_app_number] => 13/447583 [patent_app_country] => US [patent_app_date] => 2012-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 4405 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13447583 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8337285 [patent_doc_number] => 20120203996 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-09 [patent_title] => 'DATA MIGRATION METHODOLOGY FOR USE WITH ARRAYS OF POWERED-DOWN STORAGE DEVICES' [patent_app_type] => utility [patent_app_number] => 13/447434 [patent_app_country] => US [patent_app_date] => 2012-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5391 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13447434 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9289305 [patent_doc_number] => 08645661 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-04 [patent_title] => 'Paging partition arbitration of paging devices to shared memory partitions' [patent_app_type] => utility [patent_app_number] => 13/445416 [patent_app_country] => US [patent_app_date] => 2012-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 7232 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13445416 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8302668 [patent_doc_number] => 20120185228 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-19 [patent_title] => 'Structure for Performing Cacheline Polling Utilizing a Store and Reserve Instruction' [patent_app_type] => utility [patent_app_number] => 13/426840 [patent_app_country] => US [patent_app_date] => 2012-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7747 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13426840 [rel_patent_id] =>[rel_patent_doc_number] =>)